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drm/amd: Add ucode DMCU support
DMCU (Display Microcontroller Unit) is a GPU chip involved in eDP features like Adaptive Backlight Modulation and Panel Self Refresh. DMCU has two pieces of firmware: the ERAM and the interrupt vectors, which must be loaded seperately. To this end, the DMCU firmware has a custom header and parsing logic similar to MEC, to extract the two ucodes from a single struct firmware. Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher
parent
240cd9a642
commit
01fcfc83fe
@@ -157,6 +157,13 @@ struct gpu_info_firmware_header_v1_0 {
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uint16_t version_minor; /* version */
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};
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/* version_major=1, version_minor=0 */
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struct dmcu_firmware_header_v1_0 {
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struct common_firmware_header header;
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uint32_t intv_offset_bytes; /* interrupt vectors offset from end of header, in bytes */
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uint32_t intv_size_bytes; /* size of interrupt vectors, in bytes */
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};
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/* header is fixed size */
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union amdgpu_firmware_header {
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struct common_firmware_header common;
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@@ -170,6 +177,7 @@ union amdgpu_firmware_header {
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struct sdma_firmware_header_v1_0 sdma;
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struct sdma_firmware_header_v1_1 sdma_v1_1;
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struct gpu_info_firmware_header_v1_0 gpu_info;
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struct dmcu_firmware_header_v1_0 dmcu;
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uint8_t raw[0x100];
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};
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@@ -196,6 +204,8 @@ enum AMDGPU_UCODE_ID {
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AMDGPU_UCODE_ID_UVD1,
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AMDGPU_UCODE_ID_VCE,
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AMDGPU_UCODE_ID_VCN,
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AMDGPU_UCODE_ID_DMCU_ERAM,
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AMDGPU_UCODE_ID_DMCU_INTV,
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AMDGPU_UCODE_ID_MAXIMUM,
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};
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