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drm/amd/virt: For SRIOV send GPU reset directly to TDR queue.
No need to to trigger another work queue inside the work queue. v3: Problem: Extra reset caused by host side FLR notification following guest side triggered reset. Fix: Preven qeuing flr_work from mailbox irq if guest already executing a reset. Suggested-by: Liu Shaoyun <Shaoyun.Liu@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Liu Shaoyun <Shaoyun.Liu@amd.com> Link: https://www.spinics.net/lists/amd-gfx/msg74114.html
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@@ -309,7 +309,7 @@ flr_done:
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adev->gfx_timeout == MAX_SCHEDULE_TIMEOUT ||
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adev->compute_timeout == MAX_SCHEDULE_TIMEOUT ||
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adev->video_timeout == MAX_SCHEDULE_TIMEOUT))
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amdgpu_device_gpu_recover(adev, NULL);
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amdgpu_device_gpu_recover_imp(adev, NULL);
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}
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static int xgpu_nv_set_mailbox_rcv_irq(struct amdgpu_device *adev,
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@@ -337,8 +337,11 @@ static int xgpu_nv_mailbox_rcv_irq(struct amdgpu_device *adev,
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switch (event) {
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case IDH_FLR_NOTIFICATION:
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if (amdgpu_sriov_runtime(adev))
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schedule_work(&adev->virt.flr_work);
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if (amdgpu_sriov_runtime(adev) && !amdgpu_in_reset(adev))
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WARN_ONCE(!queue_work(adev->reset_domain.wq,
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&adev->virt.flr_work),
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"Failed to queue work! at %s",
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__func__);
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break;
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/* READY_TO_ACCESS_GPU is fetched by kernel polling, IRQ can ignore
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* it byfar since that polling thread will handle it,
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