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Merge branch 'pci/aspm'

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- Fix ASPM usage of pci_clear_and_set_config_dword() to prevent
  inadvertently setting Common_Mode_Restore_Time and other fields (Lukas
  Wunner)

* pci/aspm:
  PCI/ASPM: Fix pci_clear_and_set_config_dword() usage
This commit is contained in:
Bjorn Helgaas
2026-04-13 12:50:01 -05:00
parent b3a631e43f cc33985d26
commit 02c511ebd0
1 changed files with 12 additions and 5 deletions
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17
drivers/pci/pcie/aspm.c
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@@ -706,22 +706,29 @@ static void aspm_calc_l12_info(struct pcie_link_state *link,
}
/* Program T_POWER_ON times in both ports */
pci_write_config_dword(parent, parent->l1ss + PCI_L1SS_CTL2, ctl2);
pci_write_config_dword(child, child->l1ss + PCI_L1SS_CTL2, ctl2);
pci_clear_and_set_config_dword(parent, parent->l1ss + PCI_L1SS_CTL2,
PCI_L1SS_CTL2_T_PWR_ON_VALUE |
PCI_L1SS_CTL2_T_PWR_ON_SCALE, ctl2);
pci_clear_and_set_config_dword(child, child->l1ss + PCI_L1SS_CTL2,
PCI_L1SS_CTL2_T_PWR_ON_VALUE |
PCI_L1SS_CTL2_T_PWR_ON_SCALE, ctl2);
/* Program Common_Mode_Restore_Time in upstream device */
pci_clear_and_set_config_dword(parent, parent->l1ss + PCI_L1SS_CTL1,
PCI_L1SS_CTL1_CM_RESTORE_TIME, ctl1);
PCI_L1SS_CTL1_CM_RESTORE_TIME,
ctl1 & PCI_L1SS_CTL1_CM_RESTORE_TIME);
/* Program LTR_L1.2_THRESHOLD time in both ports */
pci_clear_and_set_config_dword(parent, parent->l1ss + PCI_L1SS_CTL1,
PCI_L1SS_CTL1_LTR_L12_TH_VALUE |
PCI_L1SS_CTL1_LTR_L12_TH_SCALE,
ctl1);
ctl1 & (PCI_L1SS_CTL1_LTR_L12_TH_VALUE |
PCI_L1SS_CTL1_LTR_L12_TH_SCALE));
pci_clear_and_set_config_dword(child, child->l1ss + PCI_L1SS_CTL1,
PCI_L1SS_CTL1_LTR_L12_TH_VALUE |
PCI_L1SS_CTL1_LTR_L12_TH_SCALE,
ctl1);
ctl1 & (PCI_L1SS_CTL1_LTR_L12_TH_VALUE |
PCI_L1SS_CTL1_LTR_L12_TH_SCALE));
if (pl1_2_enables || cl1_2_enables) {
pci_clear_and_set_config_dword(parent,