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drm/amdgpu: revert "implement tdr advanced mode"

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This reverts commit e6c6338f39.

This feature basically re-submits one job after another to
figure out which one was the one causing a hang.

This is obviously incompatible with gang-submit which requires
that multiple jobs run at the same time. It's also absolutely
not helpful to crash the hardware multiple times if a clean
recovery is desired.

For testing and debugging environments we should rather disable
recovery alltogether to be able to inspect the state with a hw
debugger.

Additional to that the sw implementation is clearly buggy and causes
reference count issues for the hardware fence.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König
2022-10-26 12:26:37 +02:00
committed by Alex Deucher
parent d27252b570
commit 06a2d7cc3f
4 changed files with 10 additions and 156 deletions
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103
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
View File

@@ -5088,94 +5088,6 @@ static int amdgpu_device_suspend_display_audio(struct amdgpu_device *adev)
return 0;
}
static void amdgpu_device_recheck_guilty_jobs(
struct amdgpu_device *adev, struct list_head *device_list_handle,
struct amdgpu_reset_context *reset_context)
{
int i, r = 0;
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = adev->rings[i];
int ret = 0;
struct drm_sched_job *s_job;
if (!ring || !ring->sched.thread)
continue;
s_job = list_first_entry_or_null(&ring->sched.pending_list,
struct drm_sched_job, list);
if (s_job == NULL)
continue;
/* clear job's guilty and depend the folowing step to decide the real one */
drm_sched_reset_karma(s_job);
drm_sched_resubmit_jobs_ext(&ring->sched, 1);
if (!s_job->s_fence->parent) {
DRM_WARN("Failed to get a HW fence for job!");
continue;
}
ret = dma_fence_wait_timeout(s_job->s_fence->parent, false, ring->sched.timeout);
if (ret == 0) { /* timeout */
DRM_ERROR("Found the real bad job! ring:%s, job_id:%llx\n",
ring->sched.name, s_job->id);
amdgpu_fence_driver_isr_toggle(adev, true);
/* Clear this failed job from fence array */
amdgpu_fence_driver_clear_job_fences(ring);
amdgpu_fence_driver_isr_toggle(adev, false);
/* Since the job won't signal and we go for
* another resubmit drop this parent pointer
*/
dma_fence_put(s_job->s_fence->parent);
s_job->s_fence->parent = NULL;
/* set guilty */
drm_sched_increase_karma(s_job);
amdgpu_reset_prepare_hwcontext(adev, reset_context);
retry:
/* do hw reset */
if (amdgpu_sriov_vf(adev)) {
amdgpu_virt_fini_data_exchange(adev);
r = amdgpu_device_reset_sriov(adev, false);
if (r)
adev->asic_reset_res = r;
} else {
clear_bit(AMDGPU_SKIP_HW_RESET,
&reset_context->flags);
r = amdgpu_do_asic_reset(device_list_handle,
reset_context);
if (r && r == -EAGAIN)
goto retry;
}
/*
* add reset counter so that the following
* resubmitted job could flush vmid
*/
atomic_inc(&adev->gpu_reset_counter);
continue;
}
/* got the hw fence, signal finished fence */
atomic_dec(ring->sched.score);
dma_fence_get(&s_job->s_fence->finished);
dma_fence_signal(&s_job->s_fence->finished);
dma_fence_put(&s_job->s_fence->finished);
/* remove node from list and free the job */
spin_lock(&ring->sched.job_list_lock);
list_del_init(&s_job->list);
spin_unlock(&ring->sched.job_list_lock);
ring->sched.ops->free_job(s_job);
}
}
static inline void amdgpu_device_stop_pending_resets(struct amdgpu_device *adev)
{
struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
@@ -5196,7 +5108,6 @@ static inline void amdgpu_device_stop_pending_resets(struct amdgpu_device *adev)
}
/**
* amdgpu_device_gpu_recover - reset the asic and recover scheduler
*
@@ -5219,7 +5130,6 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
int i, r = 0;
bool need_emergency_restart = false;
bool audio_suspended = false;
int tmp_vram_lost_counter;
bool gpu_reset_for_dev_remove = false;
gpu_reset_for_dev_remove =
@@ -5365,7 +5275,6 @@ retry: /* Rest of adevs pre asic reset from XGMI hive. */
amdgpu_device_stop_pending_resets(tmp_adev);
}
tmp_vram_lost_counter = atomic_read(&((adev)->vram_lost_counter));
/* Actual ASIC resets if needed.*/
/* Host driver will handle XGMI hive reset for SRIOV */
if (amdgpu_sriov_vf(adev)) {
@@ -5390,18 +5299,6 @@ skip_hw_reset:
/* Post ASIC reset for all devs .*/
list_for_each_entry(tmp_adev, device_list_handle, reset_list) {
/*
* Sometimes a later bad compute job can block a good gfx job as gfx
* and compute ring share internal GC HW mutually. We add an additional
* guilty jobs recheck step to find the real guilty job, it synchronously
* submits and pends for the first job being signaled. If it gets timeout,
* we identify it as a real guilty job.
*/
if (amdgpu_gpu_recovery == 2 &&
!(tmp_vram_lost_counter < atomic_read(&adev->vram_lost_counter)))
amdgpu_device_recheck_guilty_jobs(
tmp_adev, device_list_handle, reset_context);
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = tmp_adev->rings[i];