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drm/amdgpu: Implement unrecoverable error message handling for VFs
This notification may arrive in VF mailbox while polling for response from another event. This patches covers the following scenarios: - If VF is already in RMA state, then do not attempt to contact the host. Host will ignore the VF after sending the notification. - If the notification is detected during polling, then set the RMA status, and return error to caller. - If the notification arrives by interrupt, then set the RMA status and queue a reset. This reset will fail and VF will stop runtime services. Reviewed-by: Shravan Kumar Gande <Shravankumar.Gande@amd.com> Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com> Signed-off-by: Ellen Pan <yunru.pan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -67,6 +67,8 @@ static int xgpu_nv_mailbox_rcv_msg(struct amdgpu_device *adev,
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reg = RREG32_NO_KIQ(mmMAILBOX_MSGBUF_RCV_DW0);
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if (reg == IDH_FAIL)
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r = -EINVAL;
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if (reg == IDH_UNRECOV_ERR_NOTIFICATION)
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r = -ENODEV;
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else if (reg != event)
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return -ENOENT;
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@@ -103,6 +105,7 @@ static int xgpu_nv_poll_msg(struct amdgpu_device *adev, enum idh_event event)
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{
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int r;
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uint64_t timeout, now;
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struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
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now = (uint64_t)ktime_to_ms(ktime_get());
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timeout = now + NV_MAILBOX_POLL_MSG_TIMEDOUT;
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@@ -110,8 +113,16 @@ static int xgpu_nv_poll_msg(struct amdgpu_device *adev, enum idh_event event)
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do {
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r = xgpu_nv_mailbox_rcv_msg(adev, event);
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if (!r) {
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dev_dbg(adev->dev, "rcv_msg 0x%x after %llu ms\n", event, NV_MAILBOX_POLL_MSG_TIMEDOUT - timeout + now);
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dev_dbg(adev->dev, "rcv_msg 0x%x after %llu ms\n",
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event, NV_MAILBOX_POLL_MSG_TIMEDOUT - timeout + now);
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return 0;
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} else if (r == -ENODEV) {
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if (!amdgpu_ras_is_rma(adev)) {
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ras->is_rma = true;
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dev_err(adev->dev, "VF is in an unrecoverable state. "
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"Runtime Services are halted.\n");
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}
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return r;
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}
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msleep(10);
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@@ -166,6 +177,10 @@ static int xgpu_nv_send_access_requests_with_param(struct amdgpu_device *adev,
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enum idh_event event = -1;
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send_request:
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if (amdgpu_ras_is_rma(adev))
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return -ENODEV;
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xgpu_nv_mailbox_trans_msg(adev, req, data1, data2, data3);
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switch (req) {
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@@ -323,6 +338,7 @@ static void xgpu_nv_mailbox_flr_work(struct work_struct *work)
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{
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struct amdgpu_virt *virt = container_of(work, struct amdgpu_virt, flr_work);
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struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt);
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struct amdgpu_reset_context reset_context = { 0 };
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amdgpu_virt_fini_data_exchange(adev);
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@@ -333,8 +349,6 @@ static void xgpu_nv_mailbox_flr_work(struct work_struct *work)
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adev->gfx_timeout == MAX_SCHEDULE_TIMEOUT ||
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adev->compute_timeout == MAX_SCHEDULE_TIMEOUT ||
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adev->video_timeout == MAX_SCHEDULE_TIMEOUT)) {
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struct amdgpu_reset_context reset_context;
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memset(&reset_context, 0, sizeof(reset_context));
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reset_context.method = AMD_RESET_METHOD_NONE;
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reset_context.reset_req_dev = adev;
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@@ -380,6 +394,7 @@ static int xgpu_nv_mailbox_rcv_irq(struct amdgpu_device *adev,
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struct amdgpu_iv_entry *entry)
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{
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enum idh_event event = xgpu_nv_mailbox_peek_msg(adev);
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struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
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switch (event) {
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case IDH_RAS_BAD_PAGES_NOTIFICATION:
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@@ -387,6 +402,19 @@ static int xgpu_nv_mailbox_rcv_irq(struct amdgpu_device *adev,
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if (amdgpu_sriov_runtime(adev))
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schedule_work(&adev->virt.bad_pages_work);
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break;
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case IDH_UNRECOV_ERR_NOTIFICATION:
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xgpu_nv_mailbox_send_ack(adev);
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if (!amdgpu_ras_is_rma(adev)) {
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ras->is_rma = true;
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dev_err(adev->dev, "VF is in an unrecoverable state. Runtime Services are halted.\n");
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}
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if (amdgpu_sriov_runtime(adev))
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WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain,
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&adev->virt.flr_work),
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"Failed to queue work! at %s",
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__func__);
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break;
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case IDH_FLR_NOTIFICATION:
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if (amdgpu_sriov_runtime(adev))
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WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain,
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