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drm/amd/display: Add DCN3.1 clock manager support

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Adds support for clock requests for the various parts of the DCN3.1 IP
and the interfaces and definitions for sending messages to SMU/PMFW.

Includes new support for z9/10, detecting SMU timeout and p-state
support enablement.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Nicholas Kazlauskas
2021-05-19 10:47:22 -04:00
committed by Alex Deucher
parent d997ea5c58
commit 118a331516
11 changed files with 1454 additions and 0 deletions
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6
drivers/gpu/drm/amd/display/dc/dm_helpers.h
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@@ -162,6 +162,12 @@ void dm_set_dcn_clocks(
bool dm_helpers_dmub_outbox_interrupt_control(struct dc_context *ctx, bool enable);
void dm_helpers_smu_timeout(struct dc_context *ctx, unsigned int msg_id, unsigned int param, unsigned int timeout_us);
// 0x1 = Result_OK, 0xFE = Result_UnkmownCmd
#define IS_SMU_TIMEOUT(result) \
(!(result == 0x1 || result == 0xFE))
int dm_helper_dmub_aux_transfer_sync(
struct dc_context *ctx,
const struct dc_link *link,