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drm/amdgpu: avoid memory allocation in the critical code path v3
When we run out of VMIDs we need to wait for some to become available. Previously we were using a dma_fence_array for that, but this means that we have to allocate memory. Instead just wait for the first not signaled fence from the least recently used VMID to signal. That is not as efficient since we end up in this function multiple times again, but allocating memory can easily fail or deadlock if we have to wait for memory to become available. v2: remove now unused VM manager fields v3: fix dma_fence reference Signed-off-by: Christian König <christian.koenig@amd.com> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4258 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher
parent
f8bdb559c0
commit
20459c098d
@@ -2843,8 +2843,6 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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*/
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void amdgpu_vm_manager_init(struct amdgpu_device *adev)
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{
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unsigned i;
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/* Concurrent flushes are only possible starting with Vega10 and
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* are broken on Navi10 and Navi14.
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*/
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@@ -2853,11 +2851,6 @@ void amdgpu_vm_manager_init(struct amdgpu_device *adev)
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adev->asic_type == CHIP_NAVI14);
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amdgpu_vmid_mgr_init(adev);
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adev->vm_manager.fence_context =
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dma_fence_context_alloc(AMDGPU_MAX_RINGS);
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
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adev->vm_manager.seqno[i] = 0;
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spin_lock_init(&adev->vm_manager.prt_lock);
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atomic_set(&adev->vm_manager.num_prt_users, 0);
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