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drm/amdgpu: Add soc v1_0 support

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v1_0 is a new generation ip block

v2: squash in doorbell changes (Alex)
v3: squash in xclk, reset placeholders, pcie r|wreg ext callbacks

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang
2025-02-24 10:03:27 +08:00
committed by Alex Deucher
parent c71980a3fc
commit 297b0cebbc
4 changed files with 400 additions and 1 deletions
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30
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
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@@ -348,6 +348,36 @@ enum AMDGPU_DOORBELL_ASSIGNMENT_LAYOUT1 {
AMDGPU_DOORBELL_LAYOUT1_INVALID = 0xFFFF
};
enum AMDGPU_SOC_V1_0_DOORBELL_ASSIGNMENT {
/* KIQ/HIQ/DIQ */
AMDGPU_SOC_V1_0_DOORBELL_KIQ_START = 0x000,
AMDGPU_SOC_V1_0_DOORBELL_HIQ = 0x001,
AMDGPU_SOC_V1_0_DOORBELL_DIQ = 0x002,
/* Compute: 0x03 ~ 0x20 */
AMDGPU_SOC_V1_0_DOORBELL_MEC_RING_START = 0x003,
AMDGPU_SOC_V1_0_DOORBELL_MEC_RING_END = 0x00A,
AMDGPU_SOC_V1_0_DOORBELL_MES_RING0 = 0x00B,
AMDGPU_SOC_V1_0_DOORBELL_MES_RING1 = 0x00C,
AMDGPU_SOC_V1_0_DOORBELL_USERQUEUE_START = 0x00D,
AMDGPU_SOC_V1_0_DOORBELL_USERQUEUE_END = 0x01F,
AMDGPU_SOC_V1_0_DOORBELL_XCC_RANGE = 0x020,
/* SDMA: 0x100 ~ 0x19F */
AMDGPU_SOC_V1_0_DOORBELL_sDMA_ENGINE_START = 0x100,
AMDGPU_SOC_V1_0_DOORBELL_sDMA_ENGINE_END = 0x19F,
/* IH: 0x1A0 ~ 0x1AF */
AMDGPU_SOC_V1_0_DOORBELL_IH = 0x1A0,
/* VCN: 0x1B0 ~ 0x1EF */
AMDGPU_SOC_V1_0_DOORBELL_VCN_START = 0x1B0,
AMDGPU_SOC_V1_0_DOORBELL_VCN_END = 0x1EF,
AMDGPU_SOC_V1_0_DOORBELL_FIRST_NON_CP = AMDGPU_SOC_V1_0_DOORBELL_sDMA_ENGINE_START,
AMDGPU_SOC_V1_0_DOORBELL_LAST_NON_CP = AMDGPU_SOC_V1_0_DOORBELL_VCN_END,
AMDGPU_SOC_V1_0_DOORBELL_MAX_ASSIGNMENT = 0x1EF,
AMDGPU_SOC_V1_0_DOORBELL_INVALID = 0xFFFF
};
u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index);
void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v);
u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index);