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drm/amd/display: Add dcn3.01 support to DC (v2)
Update dc for vangogh support. v2: fix compilation without DCN 301 set. Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
@@ -22,7 +22,7 @@
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DMUB = dmub_srv.o dmub_reg.o dmub_dcn20.o dmub_dcn21.o
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ifdef CONFIG_DRM_AMD_DC_DCN3_0
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DMUB += dmub_dcn30.o
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DMUB += dmub_dcn30.o dmub_dcn301.o
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endif
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AMD_DAL_DMUB = $(addprefix $(AMDDALPATH)/dmub/src/,$(DMUB))
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55
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn301.c
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55
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn301.c
Normal file
@@ -0,0 +1,55 @@
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/*
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* Copyright 2020 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "../dmub_srv.h"
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#include "dmub_reg.h"
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#include "dmub_dcn301.h"
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#include "dcn/dcn_3_0_1_offset.h"
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#include "dcn/dcn_3_0_1_sh_mask.h"
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#include "vangogh_ip_offset.h"
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#define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg
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#define CTX dmub
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#define REGS dmub->regs
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/* Registers. */
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const struct dmub_srv_common_regs dmub_srv_dcn301_regs = {
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#define DMUB_SR(reg) REG_OFFSET(reg),
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{ DMUB_COMMON_REGS() },
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#undef DMUB_SR
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#define DMUB_SF(reg, field) FD_MASK(reg, field),
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{ DMUB_COMMON_FIELDS() },
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#undef DMUB_SF
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#define DMUB_SF(reg, field) FD_SHIFT(reg, field),
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{ DMUB_COMMON_FIELDS() },
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#undef DMUB_SF
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};
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/* Shared functions. */
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37
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn301.h
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37
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn301.h
Normal file
@@ -0,0 +1,37 @@
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/*
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* Copyright 2020 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef _DMUB_DCN301_H_
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#define _DMUB_DCN301_H_
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#include "dmub_dcn20.h"
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/* Registers. */
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extern const struct dmub_srv_common_regs dmub_srv_dcn301_regs;
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/* Hardware functions. */
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#endif /* _DMUB_DCN301_H_ */
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@@ -30,6 +30,9 @@
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#ifdef CONFIG_DRM_AMD_DC_DCN3_0
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#include "dmub_dcn30.h"
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#endif
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#ifdef CONFIG_DRM_AMD_DC_DCN3_01
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#include "dmub_dcn301.h"
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#endif
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#include "os_types.h"
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/*
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* Note: the DMUB service is standalone. No additional headers should be
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@@ -138,6 +141,9 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
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case DMUB_ASIC_DCN21:
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#ifdef CONFIG_DRM_AMD_DC_DCN3_0
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case DMUB_ASIC_DCN30:
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#endif
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#ifdef CONFIG_DRM_AMD_DC_DCN3_01
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case DMUB_ASIC_DCN301:
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#endif
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dmub->regs = &dmub_srv_dcn20_regs;
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@@ -169,6 +175,14 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
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funcs->setup_windows = dmub_dcn30_setup_windows;
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}
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#endif
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#ifdef CONFIG_DRM_AMD_DC_DCN3_01
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if (asic == DMUB_ASIC_DCN301) {
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dmub->regs = &dmub_srv_dcn301_regs;
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funcs->backdoor_load = dmub_dcn30_backdoor_load;
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funcs->setup_windows = dmub_dcn30_setup_windows;
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}
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#endif
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break;
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default:
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