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drm/amd/display: [FW Promotion] Release 0.0.80

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- Add volatile to avoid incomplete flushing of data in rb

Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Tested-by: Daniel Wheeler <Daniel.Wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Anthony Koo
2021-08-14 20:02:06 -04:00
committed by Alex Deucher
parent 58065a1e52
commit 3a9d5b0b53
1 changed files with 18 additions and 11 deletions
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29
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
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@@ -47,10 +47,10 @@
/* Firmware versioning. */
#ifdef DMUB_EXPOSE_VERSION
#define DMUB_FW_VERSION_GIT_HASH 0x7383caadc
#define DMUB_FW_VERSION_GIT_HASH 0x591aacca1
#define DMUB_FW_VERSION_MAJOR 0
#define DMUB_FW_VERSION_MINOR 0
#define DMUB_FW_VERSION_REVISION 79
#define DMUB_FW_VERSION_REVISION 80
#define DMUB_FW_VERSION_TEST 0
#define DMUB_FW_VERSION_VBIOS 0
#define DMUB_FW_VERSION_HOTFIX 0
@@ -2485,14 +2485,16 @@ static inline bool dmub_rb_full(struct dmub_rb *rb)
static inline bool dmub_rb_push_front(struct dmub_rb *rb,
const union dmub_rb_cmd *cmd)
{
uint8_t *dst = (uint8_t *)(rb->base_address) + rb->wrpt;
const uint8_t *src = (const uint8_t *)cmd;
uint64_t volatile *dst = (uint64_t volatile *)(rb->base_address) + rb->wrpt / sizeof(uint64_t);
const uint64_t *src = (const uint64_t *)cmd;
uint8_t i;
if (dmub_rb_full(rb))
return false;
// copying data
dmub_memcpy(dst, src, DMUB_RB_CMD_SIZE);
for (i = 0; i < DMUB_RB_CMD_SIZE / sizeof(uint64_t); i++)
*dst++ = *src++;
rb->wrpt += DMUB_RB_CMD_SIZE;
@@ -2601,14 +2603,16 @@ static inline bool dmub_rb_peek_offset(struct dmub_rb *rb,
static inline bool dmub_rb_out_front(struct dmub_rb *rb,
union dmub_rb_out_cmd *cmd)
{
const uint8_t *src = (const uint8_t *)(rb->base_address) + rb->rptr;
uint8_t *dst = (uint8_t *)cmd;
const uint64_t volatile *src = (const uint64_t volatile *)(rb->base_address) + rb->rptr / sizeof(uint64_t);
uint64_t *dst = (uint64_t *)cmd;
uint8_t i;
if (dmub_rb_empty(rb))
return false;
// copying data
dmub_memcpy(dst, src, DMUB_RB_CMD_SIZE);
for (i = 0; i < DMUB_RB_CMD_SIZE / sizeof(uint64_t); i++)
*dst++ = *src++;
return true;
}
@@ -2643,14 +2647,17 @@ static inline bool dmub_rb_pop_front(struct dmub_rb *rb)
*/
static inline void dmub_rb_flush_pending(const struct dmub_rb *rb)
{
uint8_t buf[DMUB_RB_CMD_SIZE];
uint32_t rptr = rb->rptr;
uint32_t wptr = rb->wrpt;
while (rptr != wptr) {
const uint8_t *data = (const uint8_t *)rb->base_address + rptr;
uint64_t volatile *data = (uint64_t volatile *)rb->base_address + rptr / sizeof(uint64_t);
//uint64_t volatile *p = (uint64_t volatile *)data;
uint64_t temp;
uint8_t i;
dmub_memcpy(buf, data, DMUB_RB_CMD_SIZE);
for (i = 0; i < DMUB_RB_CMD_SIZE / sizeof(uint64_t); i++)
temp = *data++;
rptr += DMUB_RB_CMD_SIZE;
if (rptr >= rb->capacity)