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drm/amd/display: Add DP 2.0 MST DM Support
[Why] Add DP2 MST and debugfs support [How] Update the slot info based on the link encoding format Reviewed-by: "Lin, Wayne" <Wayne.Lin@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211025223825.301703-5-lyude@redhat.com
This commit is contained in:
committed by
Lyude Paul
parent
d740e0bf8e
commit
41724ea273
@@ -10684,6 +10684,8 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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struct dsc_mst_fairness_vars vars[MAX_PIPES];
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#endif
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struct drm_dp_mst_topology_state *mst_state;
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struct drm_dp_mst_topology_mgr *mgr;
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trace_amdgpu_dm_atomic_check_begin(state);
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@@ -10891,6 +10893,33 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
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lock_and_validation_needed = true;
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}
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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/* set the slot info for each mst_state based on the link encoding format */
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for_each_new_mst_mgr_in_state(state, mgr, mst_state, i) {
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struct amdgpu_dm_connector *aconnector;
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struct drm_connector *connector;
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struct drm_connector_list_iter iter;
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u8 link_coding_cap;
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if (!mgr->mst_state )
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continue;
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drm_connector_list_iter_begin(dev, &iter);
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drm_for_each_connector_iter(connector, &iter) {
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int id = connector->index;
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if (id == mst_state->mgr->conn_base_id) {
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aconnector = to_amdgpu_dm_connector(connector);
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link_coding_cap = dc_link_dp_mst_decide_link_encoding_format(aconnector->dc_link);
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drm_dp_mst_update_slots(mst_state, link_coding_cap);
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break;
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}
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}
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drm_connector_list_iter_end(&iter);
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}
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#endif
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/**
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* Streams and planes are reset when there are changes that affect
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* bandwidth. Anything that affects bandwidth needs to go through
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