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drm/amdgpu: protect RAS sysfs during GPU reset

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MMHub EDC becomes dirty after BACO reset

EDC registers should be cleared early on in reset phase

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
John Clements
2020-03-19 14:41:55 +08:00
committed by Alex Deucher
parent cb7adfd6ad
commit 43c4d57618
2 changed files with 20 additions and 1 deletions
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9
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
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@@ -281,6 +281,11 @@ static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f, const char __user *
struct ras_debug_if data;
int ret = 0;
if (amdgpu_ras_intr_triggered()) {
DRM_WARN("RAS WARN: error injection currently inaccessible\n");
return size;
}
ret = amdgpu_ras_debugfs_ctrl_parse_data(f, buf, size, pos, &data);
if (ret)
return -EINVAL;
@@ -394,6 +399,10 @@ static ssize_t amdgpu_ras_sysfs_read(struct device *dev,
.head = obj->head,
};
if (amdgpu_ras_intr_triggered())
return snprintf(buf, PAGE_SIZE,
"Query currently inaccessible\n");
if (amdgpu_ras_error_query(obj->adev, &info))
return -EINVAL;