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crypto: qat - add reporting of errors from ERRSOU1 for QAT GEN4
Add logic to detect and report uncorrectable errors reported through the ERRSOU1 register in QAT GEN4 devices. This also introduces the adf_dev_err_mask structure as part of adf_hw_device_data which will allow to provide different error masks per device generation. Signed-off-by: Shashank Gupta <shashank.gupta@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Tero Kristo <tero.kristo@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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committed by
Herbert Xu
parent
df8c184b77
commit
4926e89d19
@@ -176,6 +176,10 @@ struct adf_dc_ops {
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void (*build_deflate_ctx)(void *ctx);
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};
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struct adf_dev_err_mask {
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u32 cppagentcmdpar_mask;
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};
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struct adf_hw_device_data {
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struct adf_hw_device_class *dev_class;
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u32 (*get_accel_mask)(struct adf_hw_device_data *self);
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@@ -222,6 +226,7 @@ struct adf_hw_device_data {
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struct adf_hw_csr_ops csr_ops;
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struct adf_dc_ops dc_ops;
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struct adf_ras_ops ras_ops;
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struct adf_dev_err_mask dev_err_mask;
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const char *fw_name;
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const char *fw_mmp_name;
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u32 fuses;
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@@ -270,6 +275,7 @@ struct adf_hw_device_data {
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#define GET_SRV_TYPE(accel_dev, idx) \
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(((GET_HW_DATA(accel_dev)->ring_to_svc_map) >> (ADF_SRV_TYPE_BIT_LEN * (idx))) \
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& ADF_SRV_TYPE_MASK)
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#define GET_ERR_MASK(accel_dev) (&GET_HW_DATA(accel_dev)->dev_err_mask)
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#define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines)
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#define GET_CSR_OPS(accel_dev) (&(accel_dev)->hw_device->csr_ops)
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#define GET_PFVF_OPS(accel_dev) (&(accel_dev)->hw_device->pfvf_ops)
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