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drm/amd/display: Set DFS bypass flags for dce110
[Why] While there is support for using and quering DFS bypass clocks the hardware is never notified to enter DFS bypass mode for dce110. [How] Add a flag that can be set when programming the display engine PLL to enable DFS bypass mode. If this flag is set then the hardware is notified to enter DFS bypass mode and the correct display engine clock frequency can be acquired. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher
parent
2cb3bcdb33
commit
4e60536d09
@@ -2201,6 +2201,9 @@ static enum bp_result program_clock_v6(
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if (bp_params->flags.SET_EXTERNAL_REF_DIV_SRC)
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params.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_MISC_REF_DIV_SRC;
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if (bp_params->flags.SET_DISPCLK_DFS_BYPASS)
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params.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_DPREFCLK_BYPASS;
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if (EXEC_BIOS_CMD_TABLE(SetPixelClock, params)) {
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/* True display clock is returned by VBIOS if DFS bypass
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* is enabled. */
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