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drm/amdgpu: more scheduler cleanups v2
Embed the scheduler into the ring structure instead of allocating it. Use the ring name directly instead of the id. v2: rebased, whitespace cleanup Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Chunming Zhou<david1.zhou@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
5ec92a7692
commit
4f839a243d
@@ -145,8 +145,13 @@ static uint32_t amdgpu_sa_get_ring_from_fence(struct fence *f)
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struct amd_sched_fence *s_fence;
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s_fence = to_amd_sched_fence(f);
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if (s_fence)
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return s_fence->sched->ring_id;
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if (s_fence) {
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struct amdgpu_ring *ring;
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ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
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return ring->idx;
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}
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a_fence = to_amdgpu_fence(f);
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if (a_fence)
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return a_fence->ring->idx;
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@@ -412,6 +417,26 @@ void amdgpu_sa_bo_free(struct amdgpu_device *adev, struct amdgpu_sa_bo **sa_bo,
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}
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#if defined(CONFIG_DEBUG_FS)
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static void amdgpu_sa_bo_dump_fence(struct fence *fence, struct seq_file *m)
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{
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struct amdgpu_fence *a_fence = to_amdgpu_fence(fence);
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struct amd_sched_fence *s_fence = to_amd_sched_fence(fence);
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if (a_fence)
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seq_printf(m, " protected by 0x%016llx on ring %d",
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a_fence->seq, a_fence->ring->idx);
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if (s_fence) {
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struct amdgpu_ring *ring;
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ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
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seq_printf(m, " protected by 0x%016x on ring %d",
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s_fence->base.seqno, ring->idx);
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}
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}
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void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
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struct seq_file *m)
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{
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@@ -428,18 +453,8 @@ void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
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}
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seq_printf(m, "[0x%010llx 0x%010llx] size %8lld",
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soffset, eoffset, eoffset - soffset);
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if (i->fence) {
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struct amdgpu_fence *a_fence = to_amdgpu_fence(i->fence);
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struct amd_sched_fence *s_fence = to_amd_sched_fence(i->fence);
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if (a_fence)
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seq_printf(m, " protected by 0x%016llx on ring %d",
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a_fence->seq, a_fence->ring->idx);
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if (s_fence)
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seq_printf(m, " protected by 0x%016x on ring %d",
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s_fence->base.seqno,
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s_fence->sched->ring_id);
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}
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if (i->fence)
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amdgpu_sa_bo_dump_fence(i->fence, m);
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seq_printf(m, "\n");
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}
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spin_unlock(&sa_manager->wq.lock);
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