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drm/amdgpu: rework TLB flushing
Instead of tracking the VM updates through the dependencies just use a sequence counter for page table updates which indicates the need to flush the TLB. This reduces the need to flush the TLB drastically. v2: squash in NULL check fix (Christian) Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
e997b82745
commit
5255e146c9
@@ -277,7 +277,7 @@ static int amdgpu_vmid_grab_reserved(struct amdgpu_vm *vm,
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unsigned vmhub = ring->funcs->vmhub;
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uint64_t fence_context = adev->fence_context + ring->idx;
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bool needs_flush = vm->use_cpu_for_update;
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uint64_t updates = sync->last_vm_update;
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uint64_t updates = amdgpu_vm_tlb_seq(vm);
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int r;
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*id = vm->reserved_vmid[vmhub];
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@@ -338,7 +338,7 @@ static int amdgpu_vmid_grab_used(struct amdgpu_vm *vm,
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unsigned vmhub = ring->funcs->vmhub;
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struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub];
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uint64_t fence_context = adev->fence_context + ring->idx;
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uint64_t updates = sync->last_vm_update;
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uint64_t updates = amdgpu_vm_tlb_seq(vm);
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int r;
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job->vm_needs_flush = vm->use_cpu_for_update;
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@@ -426,7 +426,7 @@ int amdgpu_vmid_grab(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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if (r)
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goto error;
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id->flushed_updates = sync->last_vm_update;
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id->flushed_updates = amdgpu_vm_tlb_seq(vm);
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job->vm_needs_flush = true;
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}
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