drm/amd/display: Enable dpia in dmub only for DCN31 B0

[Why]
DMUB binary is common for both A0 and B0. Hence, driver should
notify FW about the support for DPIA in B0.

[How]
Added dpia_supported bit in dmub_fw_boot_options and will be set
only for B0.

Assign dpia_supported to true before dm_dmub_hw_init
in B0 case.

v2: fix build without CONFIG_DRM_AMD_DC_DCN (Alex)

Signed-off-by: Jude Shih <shenshih@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jude Shih
2021-10-21 22:00:13 +08:00
committed by Alex Deucher
parent 094b21c1a3
commit 5b10939750
3 changed files with 16 additions and 0 deletions

View File

@@ -1017,6 +1017,7 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
const unsigned char *fw_inst_const, *fw_bss_data;
uint32_t i, fw_inst_const_size, fw_bss_data_size;
bool has_hw_support;
struct dc *dc = adev->dm.dc;
if (!dmub_srv)
/* DMUB isn't supported on the ASIC. */
@@ -1103,6 +1104,19 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)
for (i = 0; i < fb_info->num_fb; ++i)
hw_params.fb[i] = &fb_info->fb[i];
switch (adev->asic_type) {
case CHIP_YELLOW_CARP:
if (dc->ctx->asic_id.hw_internal_rev != YELLOW_CARP_A0) {
hw_params.dpia_supported = true;
#if defined(CONFIG_DRM_AMD_DC_DCN)
hw_params.disable_dpia = dc->debug.dpia_debug.bits.disable_dpia;
#endif
}
break;
default:
break;
}
status = dmub_srv_hw_init(dmub_srv, &hw_params);
if (status != DMUB_STATUS_OK) {
DRM_ERROR("Error initializing DMUB HW: %d\n", status);