PCI: s32g: Add NXP S32G PCIe controller driver (RC)

Add initial support of the PCIe controller for the NXP S32G SoC family.
Only host mode is supported.

Co-developed-by: Ionut Vicovan <Ionut.Vicovan@nxp.com>
Signed-off-by: Ionut Vicovan <Ionut.Vicovan@nxp.com>
Co-developed-by: Ciprian Marian Costea <ciprianmarian.costea@nxp.com>
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@nxp.com>
Co-developed-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com>
Signed-off-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com>
Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
[mani: replaced memblock_start_of_DRAM with hardcoded boundary addr]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20251121164920.2008569-4-vincent.guittot@linaro.org
This commit is contained in:
Vincent Guittot
2025-11-21 17:49:19 +01:00
committed by Bjorn Helgaas
parent 045ad2c623
commit 5cbc7d3e31
3 changed files with 417 additions and 0 deletions

View File

@@ -256,6 +256,16 @@ config PCIE_TEGRA194_EP
in order to enable device-specific features PCIE_TEGRA194_EP must be
selected. This uses the DesignWare core.
config PCIE_NXP_S32G
bool "NXP S32G PCIe controller (host mode)"
depends on ARCH_S32 || COMPILE_TEST
select PCIE_DW_HOST
help
Enable support for the PCIe controller in NXP S32G based boards to
work in Host mode. The controller is based on DesignWare IP and
can work either as RC or EP. In order to enable host-specific
features PCIE_NXP_S32G must be selected.
config PCIE_DW_PLAT
bool