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ARC: mm: use SCRATCH_DATA0 register for caching pgdir in ARCv2 only
MMU SCRATCH_DATA0 register is intended to cache task pgd. However in ARC700 SMP port, it has to be repurposed for re-entrant interrupt handling, while UP port doesn't. We currently handle these use-cases using a fabricated #define which has usual issues of dependency nesting and obvious ugliness. So clean this up: for ARC700 don't use to cache pgd (even in UP) and do the opposite for ARCv2. And while here, switch to canonical pgd_offset(). Acked-by: Mike Rapoport <rppt@linux.ibm.com> Signed-off-by: Vineet Gupta <vgupta@kernel.org>
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@@ -284,29 +284,6 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
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set_pte(ptep, pteval);
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}
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/*
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* Macro to quickly access the PGD entry, utlising the fact that some
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* arch may cache the pointer to Page Directory of "current" task
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* in a MMU register
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*
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* Thus task->mm->pgd (3 pointer dereferences, cache misses etc simply
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* becomes read a register
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*
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* ********CAUTION*******:
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* Kernel code might be dealing with some mm_struct of NON "current"
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* Thus use this macro only when you are certain that "current" is current
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* e.g. when dealing with signal frame setup code etc
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*/
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#ifdef ARC_USE_SCRATCH_REG
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#define pgd_offset_fast(mm, addr) \
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({ \
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pgd_t *pgd_base = (pgd_t *) read_aux_reg(ARC_REG_SCRATCH_DATA0); \
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pgd_base + pgd_index(addr); \
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})
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#else
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#define pgd_offset_fast(mm, addr) pgd_offset(mm, addr)
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#endif
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extern pgd_t swapper_pg_dir[] __aligned(PAGE_SIZE);
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void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
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pte_t *ptep);
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