mirror of
https://github.com/torvalds/linux.git
synced 2026-05-02 21:42:42 -04:00
Merge branch 'drm-radeon-testing' of /ssd/git/drm-radeon-next into drm-next-stage
* 'drm-radeon-testing' of /ssd/git/drm-radeon-next: drm/radeon: r100/r200 ums: block ability for userspace app to trash 0 page and beyond drm/ttm: fix function prototype to match implementation drm/radeon: use ALIGN instead of open coding it drm/radeon/kms: initialize set_surface_reg reg for rs600 asic
This commit is contained in:
@@ -105,6 +105,7 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
|
||||
DRM_ERROR("Invalid depth buffer offset\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
dev_priv->have_z_offset = 1;
|
||||
break;
|
||||
|
||||
case RADEON_EMIT_PP_CNTL:
|
||||
@@ -898,6 +899,11 @@ static void radeon_cp_dispatch_clear(struct drm_device * dev,
|
||||
if (tmp & RADEON_BACK)
|
||||
flags |= RADEON_FRONT;
|
||||
}
|
||||
if (flags & (RADEON_DEPTH|RADEON_STENCIL)) {
|
||||
if (!dev_priv->have_z_offset)
|
||||
printk_once(KERN_ERR "radeon: illegal depth clear request. Buggy mesa detected - please update.\n");
|
||||
flags &= ~(RADEON_DEPTH | RADEON_STENCIL);
|
||||
}
|
||||
|
||||
if (flags & (RADEON_FRONT | RADEON_BACK)) {
|
||||
|
||||
|
||||
Reference in New Issue
Block a user