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dt-bindings: clock: Add ARTPEC-9 clock controller

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Add dt-schema for Axis ARTPEC-9 SoC clock controller.

The Clock Management Unit (CMU) has a top-level block CMU_CMU
which generates clocks for other blocks.

Add device-tree binding definitions for following CMU blocks:
- CMU_CMU
- CMU_BUS
- CMU_CORE
- CMU_CPUCL
- CMU_FSYS0
- CMU_FSYS1
- CMU_IMEM
- CMU_PERI

Signed-off-by: GyoungBo Min <mingyoungbo@coasia.com>
Reviewed-by: Kyunghwan Kim <kenkim@coasia.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20251029130731.51305-2-ravi.patel@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
GyoungBo Min
2025-10-29 18:37:28 +05:30
committed by Krzysztof Kozlowski
parent 6de23f81a5
commit 6974ae5aa2
2 changed files with 427 additions and 0 deletions
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Documentation/devicetree/bindings/clock/axis,artpec9-clock.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/axis,artpec9-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Axis ARTPEC-9 SoC clock controller
maintainers:
- Jesper Nilsson <jesper.nilsson@axis.com>
description: |
ARTPEC-9 clock controller is comprised of several CMU (Clock Management Unit)
units, generating clocks for different domains. Those CMU units are modeled
as separate device tree nodes, and might depend on each other.
The root clock in that root tree is an external clock: OSCCLK (25 MHz).
This external clock must be defined as a fixed-rate clock in dts.
CMU_CMU is a top-level CMU, where all base clocks are prepared using PLLs and
dividers, all other clocks of function blocks (other CMUs) are usually
derived from CMU_CMU.
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume. All clocks available for usage
in clock consumer nodes are defined as preprocessor macros in
'include/dt-bindings/clock/axis,artpec9-clk.h' header.
properties:
compatible:
enum:
- axis,artpec9-cmu-cmu
- axis,artpec9-cmu-bus
- axis,artpec9-cmu-core
- axis,artpec9-cmu-cpucl
- axis,artpec9-cmu-fsys0
- axis,artpec9-cmu-fsys1
- axis,artpec9-cmu-imem
- axis,artpec9-cmu-peri
reg:
maxItems: 1
clocks:
minItems: 1
maxItems: 5
clock-names:
minItems: 1
maxItems: 5
"#clock-cells":
const: 1
required:
- compatible
- reg
- clocks
- clock-names
- "#clock-cells"
allOf:
- if:
properties:
compatible:
const: axis,artpec9-cmu-cmu
then:
properties:
clocks:
items:
- description: External reference clock (25 MHz)
clock-names:
items:
- const: fin_pll
- if:
properties:
compatible:
const: axis,artpec9-cmu-bus
then:
properties:
clocks:
items:
- description: External reference clock (25 MHz)
- description: CMU_BUS bus clock (from CMU_CMU)
clock-names:
items:
- const: fin_pll
- const: bus
- if:
properties:
compatible:
const: axis,artpec9-cmu-core
then:
properties:
clocks:
items:
- description: External reference clock (25 MHz)
- description: CMU_CORE main clock (from CMU_CMU)
clock-names:
items:
- const: fin_pll
- const: main
- if:
properties:
compatible:
const: axis,artpec9-cmu-cpucl
then:
properties:
clocks:
items:
- description: External reference clock (25 MHz)
- description: CMU_CPUCL switch clock (from CMU_CMU)
clock-names:
items:
- const: fin_pll
- const: switch
- if:
properties:
compatible:
const: axis,artpec9-cmu-fsys0
then:
properties:
clocks:
items:
- description: External reference clock (25 MHz)
- description: CMU_FSYS0 bus clock (from CMU_CMU)
- description: CMU_FSYS0 IP clock (from CMU_CMU)
clock-names:
items:
- const: fin_pll
- const: bus
- const: ip
- if:
properties:
compatible:
const: axis,artpec9-cmu-fsys1
then:
properties:
clocks:
items:
- description: External reference clock (25 MHz)
- description: CMU_FSYS1 scan0 clock (from CMU_CMU)
- description: CMU_FSYS1 scan1 clock (from CMU_CMU)
- description: CMU_FSYS1 bus clock (from CMU_CMU)
clock-names:
items:
- const: fin_pll
- const: scan0
- const: scan1
- const: bus
- if:
properties:
compatible:
const: axis,artpec9-cmu-imem
then:
properties:
clocks:
items:
- description: External reference clock (25 MHz)
- description: CMU_IMEM ACLK clock (from CMU_CMU)
- description: CMU_IMEM CA5 clock (from CMU_CMU)
- description: CMU_IMEM JPEG clock (from CMU_CMU)
- description: CMU_IMEM SSS clock (from CMU_CMU)
clock-names:
items:
- const: fin_pll
- const: aclk
- const: ca5
- const: jpeg
- const: sss
- if:
properties:
compatible:
const: axis,artpec9-cmu-peri
then:
properties:
clocks:
items:
- description: External reference clock (25 MHz)
- description: CMU_PERI IP clock (from CMU_CMU)
- description: CMU_PERI DISP clock (from CMU_CMU)
clock-names:
items:
- const: fin_pll
- const: ip
- const: disp
additionalProperties: false
examples:
# Clock controller node for CMU_FSYS1
- |
#include <dt-bindings/clock/axis,artpec9-clk.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
cmu_fsys1: clock-controller@14c10000 {
compatible = "axis,artpec9-cmu-fsys1";
reg = <0x0 0x14c10000 0x0 0x4000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&cmu_cmu CLK_DOUT_CMU_FSYS1_SCAN0>,
<&cmu_cmu CLK_DOUT_CMU_FSYS1_SCAN1>,
<&cmu_cmu CLK_DOUT_CMU_FSYS1_BUS>;
clock-names = "fin_pll", "scan0", "scan1", "bus";
};
};
...