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drm/amd/display: Add DCN3 Support in DM (v2)

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Handle DCN3 in amdgpu_dm

v2: fix num_pkrs handling

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Bhawanpreet Lakha
2020-05-21 12:48:41 -04:00
committed by Alex Deucher
parent d99f13878d
commit 790373245e
5 changed files with 80 additions and 0 deletions
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23
drivers/gpu/drm/amd/display/dc/dm_helpers.h
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@@ -35,6 +35,29 @@
struct dp_mst_stream_allocation_table;
#ifdef CONFIG_DRM_AMD_DC_DCN3_0
/*
* Allocate memory accessible by the GPU
*
* frame buffer allocations must be aligned to a 4096-byte boundary
*
* Returns virtual address, sets addr to physical address
*/
void *dm_helpers_allocate_gpu_mem(
struct dc_context *ctx,
enum dc_gpu_mem_alloc_type type,
size_t size,
long long *addr);
/*
* Free the GPU-accessible memory at the virtual address pvMem
*/
void dm_helpers_free_gpu_mem(
struct dc_context *ctx,
enum dc_gpu_mem_alloc_type type,
void *pvMem);
#endif
enum dc_edid_status dm_helpers_parse_edid_caps(
struct dc_context *ctx,
const struct dc_edid *edid,