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drm/i915: Implement color management on bdw/skl/bxt/kbl
Patch based on a previous series by Shashank Sharma.
v2: Do not read GAMMA_MODE register to figure what mode we're in
v3: Program PREC_PAL_GC_MAX to clamp pixel values > 1.0
Add documentation on how the Broadcast RGB property is affected by CTM
v4: Update contributors
v5: Refactor degamma/gamma LUTs load into a single function
v6: Fix missing intel_crtc variable (bisect issue)
v7: Fix & simplify limited range matrix multiplication (Matt Roper's
comment)
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Kumar, Kiran S <kiran.s.kumar@intel.com>
Signed-off-by: Kausal Malladi <kausalmalladi@gmail.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acknowledged-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458125837-2576-4-git-send-email-lionel.g.landwerlin@intel.com
This commit is contained in:
committed by
Matt Roper
parent
05dc698c2e
commit
82cf435b31
@@ -630,6 +630,7 @@ struct drm_i915_display_funcs {
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/* display clock increase/decrease */
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/* pll clock increase/decrease */
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void (*load_csc_matrix)(struct drm_crtc *crtc);
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void (*load_luts)(struct drm_crtc *crtc);
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};
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@@ -781,6 +782,11 @@ struct intel_device_info {
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u8 has_slice_pg:1;
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u8 has_subslice_pg:1;
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u8 has_eu_pg:1;
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struct color_luts {
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u16 degamma_lut_size;
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u16 gamma_lut_size;
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} color;
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};
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#undef DEFINE_FLAG
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