Merge drm/drm-next into drm-misc-next

Daniel needs a few commits from drm-next.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
This commit is contained in:
Maxime Ripard
2020-03-04 08:56:28 +01:00
362 changed files with 21333 additions and 13742 deletions

View File

@@ -1318,6 +1318,11 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)
if (abo->kfd_bo)
amdgpu_amdkfd_unreserve_memory_limit(abo);
/* We only remove the fence if the resv has individualized. */
WARN_ON_ONCE(bo->base.resv != &bo->base._resv);
if (bo->base.resv == &bo->base._resv)
amdgpu_amdkfd_remove_fence_on_pt_pd_bos(abo);
if (bo->mem.mem_type != TTM_PL_VRAM || !bo->mem.mm_node ||
!(abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE))
return;
@@ -1414,27 +1419,49 @@ void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,
}
/**
* amdgpu_sync_wait_resv - Wait for BO reservation fences
* amdgpu_bo_sync_wait_resv - Wait for BO reservation fences
*
* @bo: buffer object
* @adev: amdgpu device pointer
* @resv: reservation object to sync to
* @sync_mode: synchronization mode
* @owner: fence owner
* @intr: Whether the wait is interruptible
*
* Extract the fences from the reservation object and waits for them to finish.
*
* Returns:
* 0 on success, errno otherwise.
*/
int amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv,
enum amdgpu_sync_mode sync_mode, void *owner,
bool intr)
{
struct amdgpu_sync sync;
int r;
amdgpu_sync_create(&sync);
amdgpu_sync_resv(adev, &sync, resv, sync_mode, owner);
r = amdgpu_sync_wait(&sync, intr);
amdgpu_sync_free(&sync);
return r;
}
/**
* amdgpu_bo_sync_wait - Wrapper for amdgpu_bo_sync_wait_resv
* @bo: buffer object to wait for
* @owner: fence owner
* @intr: Whether the wait is interruptible
*
* Wrapper to wait for fences in a BO.
* Returns:
* 0 on success, errno otherwise.
*/
int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)
{
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
struct amdgpu_sync sync;
int r;
amdgpu_sync_create(&sync);
amdgpu_sync_resv(adev, &sync, bo->tbo.base.resv, owner, false);
r = amdgpu_sync_wait(&sync, intr);
amdgpu_sync_free(&sync);
return r;
return amdgpu_bo_sync_wait_resv(adev, bo->tbo.base.resv,
AMDGPU_SYNC_NE_OWNER, owner, intr);
}
/**