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arm64: mpam: Re-initialise MPAM regs when CPU comes online
Now that the MPAM system registers are expected to have values that change, reprogram them based on the previous value when a CPU is brought online. Previously MPAM's 'default PARTID' of 0 was always used for MPAM in kernel-space as this is the PARTID that hardware guarantees to reset. Because there are a limited number of PARTID, this value is exposed to user-space, meaning resctrl changes to the resctrl default group would also affect kernel threads. Instead, use the task's PARTID value for kernel work on behalf of user-space too. The default of 0 is kept for both user-space and kernel-space when MPAM is not enabled. Tested-by: Gavin Shan <gshan@redhat.com> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Tested-by: Peter Newman <peternewman@google.com> Tested-by: Zeng Heng <zengheng4@huawei.com> Tested-by: Punit Agrawal <punit.agrawal@oss.qualcomm.com> Tested-by: Jesse Chick <jessechick@os.amperecomputing.com> Reviewed-by: Zeng Heng <zengheng4@huawei.com> Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Co-developed-by: Ben Horgan <ben.horgan@arm.com> Signed-off-by: Ben Horgan <ben.horgan@arm.com> Signed-off-by: James Morse <james.morse@arm.com>
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@@ -86,6 +86,7 @@
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#include <asm/kvm_host.h>
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#include <asm/mmu.h>
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#include <asm/mmu_context.h>
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#include <asm/mpam.h>
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#include <asm/mte.h>
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#include <asm/hypervisor.h>
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#include <asm/processor.h>
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@@ -2492,13 +2493,17 @@ test_has_mpam(const struct arm64_cpu_capabilities *entry, int scope)
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static void
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cpu_enable_mpam(const struct arm64_cpu_capabilities *entry)
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{
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/*
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* Access by the kernel (at EL1) should use the reserved PARTID
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* which is configured unrestricted. This avoids priority-inversion
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* where latency sensitive tasks have to wait for a task that has
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* been throttled to release the lock.
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*/
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write_sysreg_s(0, SYS_MPAM1_EL1);
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int cpu = smp_processor_id();
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u64 regval = 0;
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if (IS_ENABLED(CONFIG_ARM64_MPAM) && static_branch_likely(&mpam_enabled))
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regval = READ_ONCE(per_cpu(arm64_mpam_current, cpu));
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write_sysreg_s(regval | MPAM1_EL1_MPAMEN, SYS_MPAM1_EL1);
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isb();
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/* Synchronising the EL0 write is left until the ERET to EL0 */
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write_sysreg_s(regval, SYS_MPAM0_EL1);
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}
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static bool
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