bybrooklyn/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-04-18 06:44:00 -04:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'pci/controller/cadence-sg2042'

Browse Source 
- Add cadence core flags to disable advertising broken ASPM support (Yao
  Zi)

- Disable ASPM L0s and L1 on Sophgo 2042 PCIe Root Ports that advertise
  support for them (Yao Zi)

* pci/controller/cadence-sg2042:
  PCI: sg2042: Avoid L0s and L1 on Sophgo 2042 PCIe Root Ports
  PCI: cadence: Add flags for disabling ASPM capability for broken Root Ports
This commit is contained in:
Bjorn Helgaas
2026-04-13 12:50:08 -05:00
parent cadf80e001 988ef706cd
commit 9120557a9d
3 changed files with 28 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/pci/controller/cadence/pcie-cadence-host.c
View File

@@ -147,6 +147,13 @@ static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc)
cdns_pcie_rp_writeb(pcie, PCI_CLASS_PROG, 0);
cdns_pcie_rp_writew(pcie, PCI_CLASS_DEVICE, PCI_CLASS_BRIDGE_PCI);
value = cdns_pcie_rp_readl(pcie, CDNS_PCIE_RP_CAP_OFFSET + PCI_EXP_LNKCAP);
if (rc->quirk_broken_aspm_l0s)
value &= ~PCI_EXP_LNKCAP_ASPM_L0S;
if (rc->quirk_broken_aspm_l1)
value &= ~PCI_EXP_LNKCAP_ASPM_L1;
cdns_pcie_rp_writel(pcie, CDNS_PCIE_RP_CAP_OFFSET + PCI_EXP_LNKCAP, value);
return 0;
}

19
drivers/pci/controller/cadence/pcie-cadence.h
View File

@@ -115,6 +115,8 @@ struct cdns_pcie {
* @quirk_detect_quiet_flag: LTSSM Detect Quiet min delay set as quirk
* @ecam_supported: Whether the ECAM is supported
* @no_inbound_map: Whether inbound mapping is supported
* @quirk_broken_aspm_l0s: Disable ASPM L0s support as quirk
* @quirk_broken_aspm_l1: Disable ASPM L1 support as quirk
*/
struct cdns_pcie_rc {
struct cdns_pcie pcie;
@@ -127,6 +129,8 @@ struct cdns_pcie_rc {
unsigned int quirk_detect_quiet_flag:1;
unsigned int ecam_supported:1;
unsigned int no_inbound_map:1;
unsigned int quirk_broken_aspm_l0s:1;
unsigned int quirk_broken_aspm_l1:1;
};
/**
@@ -338,6 +342,21 @@ static inline u16 cdns_pcie_rp_readw(struct cdns_pcie *pcie, u32 reg)
return cdns_pcie_read_sz(addr, 0x2);
}
static inline void cdns_pcie_rp_writel(struct cdns_pcie *pcie,
u32 reg, u32 value)
{
void __iomem *addr = pcie->reg_base + CDNS_PCIE_RP_BASE + reg;
cdns_pcie_write_sz(addr, 0x4, value);
}
static inline u32 cdns_pcie_rp_readl(struct cdns_pcie *pcie, u32 reg)
{
void __iomem *addr = pcie->reg_base + CDNS_PCIE_RP_BASE + reg;
return cdns_pcie_read_sz(addr, 0x4);
}
static inline void cdns_pcie_hpa_rp_writeb(struct cdns_pcie *pcie,
u32 reg, u8 value)
{

2
drivers/pci/controller/cadence/pcie-sg2042.c
View File

@@ -48,6 +48,8 @@ static int sg2042_pcie_probe(struct platform_device *pdev)
bridge->child_ops = &sg2042_pcie_child_ops;
rc = pci_host_bridge_priv(bridge);
rc->quirk_broken_aspm_l0s = 1;
rc->quirk_broken_aspm_l1 = 1;
pcie = &rc->pcie;
pcie->dev = dev;