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drm/i915/cdclk: Implement Wa_13012396614

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A new workaround was defined for Xe3_LPD, which requires a tweak on how
we handle MDCLK selection.  Implement it.

Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Link: https://patch.msgid.link/20251222-display-wa-13012396614-timing-of-mdclk-source-selection-v1-2-a2f7e9447f7a@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
This commit is contained in:
Gustavo Sousa
2025-12-22 19:18:48 -03:00
parent 67ccf6c60b
commit 968290fa8a
3 changed files with 31 additions and 3 deletions
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1
drivers/gpu/drm/i915/display/intel_display_wa.h
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@@ -27,6 +27,7 @@ bool intel_display_needs_wa_16023588340(struct intel_display *display);
* number.
*/
enum intel_display_wa {
INTEL_DISPLAY_WA_13012396614,
INTEL_DISPLAY_WA_14011503117,
INTEL_DISPLAY_WA_14025769978,
INTEL_DISPLAY_WA_15018326506,