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drm/amdgpu: Drop MMIO_REMAP domain bit and keep it Internal
"AMDGPU_GEM_DOMAIN_MMIO_REMAP" - Never activated as UAPI and it turned out that this was to inflexible. Allocate the MMIO_REMAP buffer object as a regular GEM BO and explicitly move it into the fixed AMDGPU_PL_MMIO_REMAP placement at the TTM level. This avoids relying on GEM domain bits for MMIO_REMAP, keeps the placement purely internal, and makes the lifetime and pinning of the global MMIO_REMAP BO explicit. The BO is pinned in TTM so it cannot be migrated or evicted. The corresponding free path relies on normal DRM teardown ordering, where no further user ioctls can access the global BO once TTM teardown begins. v2 (Srini): - Updated patch title. - Drop use of AMDGPU_GEM_DOMAIN_MMIO_REMAP in amdgpu_ttm.c. The MMIO_REMAP domain bit is removed from UAPI, so keep the MMIO_REMAP BO allocation domain-less (bp.domain = 0) and rely on the TTM placement (AMDGPU_PL_MMIO_REMAP) for backing/pinning. - Keep fdinfo/mem-stats visibility for MMIO_REMAP by classifying BOs based on bo->tbo.resource->mem_type == AMDGPU_PL_MMIO_REMAP, since the domain bit is removed. v3: Squash patches #1 & #3 Fixes:0561324837("drm/amdgpu/uapi: Introduce AMDGPU_GEM_DOMAIN_MMIO_REMAP") Fixes:2a7a794eb8("drm/amdgpu/ttm: Allocate/Free 4K MMIO_REMAP Singleton") Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Leo Liu <leo.liu@amd.com> Cc: Ruijing Dong <ruijing.dong@amd.com> Cc: David (Ming Qiang) Wu <David.Wu3@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
cf3f100cec
commit
96e97a562d
@@ -153,14 +153,6 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
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c++;
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}
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if (domain & AMDGPU_GEM_DOMAIN_MMIO_REMAP) {
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places[c].fpfn = 0;
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places[c].lpfn = 0;
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places[c].mem_type = AMDGPU_PL_MMIO_REMAP;
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places[c].flags = 0;
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c++;
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}
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if (domain & AMDGPU_GEM_DOMAIN_GTT) {
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places[c].fpfn = 0;
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places[c].lpfn = 0;
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@@ -1546,8 +1538,17 @@ u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo)
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*/
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uint32_t amdgpu_bo_mem_stats_placement(struct amdgpu_bo *bo)
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{
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uint32_t domain = bo->preferred_domains & AMDGPU_GEM_DOMAIN_MASK;
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u32 domain;
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/*
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* MMIO_REMAP is internal now, so it no longer maps from a userspace
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* domain bit. Keep fdinfo/mem-stats visibility by checking the actual
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* TTM placement.
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*/
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if (bo->tbo.resource && bo->tbo.resource->mem_type == AMDGPU_PL_MMIO_REMAP)
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return AMDGPU_PL_MMIO_REMAP;
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domain = bo->preferred_domains & AMDGPU_GEM_DOMAIN_MASK;
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if (!domain)
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return TTM_PL_SYSTEM;
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@@ -1566,8 +1567,6 @@ uint32_t amdgpu_bo_mem_stats_placement(struct amdgpu_bo *bo)
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return AMDGPU_PL_OA;
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case AMDGPU_GEM_DOMAIN_DOORBELL:
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return AMDGPU_PL_DOORBELL;
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case AMDGPU_GEM_DOMAIN_MMIO_REMAP:
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return AMDGPU_PL_MMIO_REMAP;
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default:
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return TTM_PL_SYSTEM;
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}
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