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drm/amdgpu: Drop MMIO_REMAP domain bit and keep it Internal

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"AMDGPU_GEM_DOMAIN_MMIO_REMAP" - Never activated as UAPI and it turned
out that this was to inflexible.

Allocate the MMIO_REMAP buffer object as a regular GEM BO and explicitly
move it into the fixed AMDGPU_PL_MMIO_REMAP placement at the TTM level.

This avoids relying on GEM domain bits for MMIO_REMAP, keeps the
placement purely internal, and makes the lifetime and pinning of the
global MMIO_REMAP BO explicit. The BO is pinned in TTM so it cannot be
migrated or evicted.

The corresponding free path relies on normal DRM teardown ordering,
where no further user ioctls can access the global BO once TTM teardown
begins.

v2 (Srini):
- Updated patch title.
- Drop use of AMDGPU_GEM_DOMAIN_MMIO_REMAP in amdgpu_ttm.c. The
  MMIO_REMAP domain bit is removed from UAPI, so keep the MMIO_REMAP BO
  allocation domain-less (bp.domain = 0) and rely on the TTM placement
  (AMDGPU_PL_MMIO_REMAP) for backing/pinning.
- Keep fdinfo/mem-stats visibility for MMIO_REMAP by classifying BOs
  based on bo->tbo.resource->mem_type == AMDGPU_PL_MMIO_REMAP, since the
  domain bit is removed.

v3: Squash patches #1 & #3

Fixes: 0561324837 ("drm/amdgpu/uapi: Introduce AMDGPU_GEM_DOMAIN_MMIO_REMAP")
Fixes: 2a7a794eb8 ("drm/amdgpu/ttm: Allocate/Free 4K MMIO_REMAP Singleton")
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Leo Liu <leo.liu@amd.com>
Cc: Ruijing Dong <ruijing.dong@amd.com>
Cc: David (Ming Qiang) Wu <David.Wu3@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König
2025-12-02 16:12:41 +01:00
committed by Alex Deucher
parent cf3f100cec
commit 96e97a562d
5 changed files with 60 additions and 49 deletions
Download Patch File Download Diff File Expand all files Collapse all files

77
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
View File

@@ -1909,42 +1909,45 @@ static void amdgpu_ttm_pools_fini(struct amdgpu_device *adev)
}
/**
* amdgpu_ttm_mmio_remap_bo_init - Allocate the singleton 4K MMIO_REMAP BO
* amdgpu_ttm_mmio_remap_bo_init - Allocate the singleton MMIO_REMAP BO
* @adev: amdgpu device
*
* Allocates a one-page (4K) GEM BO in AMDGPU_GEM_DOMAIN_MMIO_REMAP when the
* Allocates a global BO with backing AMDGPU_PL_MMIO_REMAP when the
* hardware exposes a remap base (adev->rmmio_remap.bus_addr) and the host
* PAGE_SIZE is <= AMDGPU_GPU_PAGE_SIZE (4K). The BO is created as a regular
* GEM object (amdgpu_bo_create).
*
* The BO is created as a normal GEM object via amdgpu_bo_create(), then
* reserved and pinned at the TTM level (ttm_bo_pin()) so it can never be
* migrated or evicted. No CPU mapping is established here.
*
* Return:
* * 0 on success or intentional skip (feature not present/unsupported)
* * negative errno on allocation failure
*/
static int amdgpu_ttm_mmio_remap_bo_init(struct amdgpu_device *adev)
static int amdgpu_ttm_alloc_mmio_remap_bo(struct amdgpu_device *adev)
{
struct ttm_operation_ctx ctx = { false, false };
struct ttm_placement placement;
struct ttm_buffer_object *tbo;
struct ttm_place placements;
struct amdgpu_bo_param bp;
struct ttm_resource *tmp;
int r;
/* Skip if HW doesn't expose remap, or if PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE (4K). */
if (!adev->rmmio_remap.bus_addr || PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE)
return 0;
/*
* Allocate a BO first and then move it to AMDGPU_PL_MMIO_REMAP.
* The initial TTM resource assigned by amdgpu_bo_create() is
* replaced below with a fixed MMIO_REMAP placement.
*/
memset(&bp, 0, sizeof(bp));
/* Create exactly one GEM BO in the MMIO_REMAP domain. */
bp.type = ttm_bo_type_device; /* userspace-mappable GEM */
bp.size = AMDGPU_GPU_PAGE_SIZE; /* 4K */
bp.type = ttm_bo_type_device;
bp.size = AMDGPU_GPU_PAGE_SIZE;
bp.byte_align = AMDGPU_GPU_PAGE_SIZE;
bp.domain = AMDGPU_GEM_DOMAIN_MMIO_REMAP;
bp.domain = 0;
bp.flags = 0;
bp.resv = NULL;
bp.bo_ptr_size = sizeof(struct amdgpu_bo);
r = amdgpu_bo_create(adev, &bp, &adev->rmmio_remap.bo);
if (r)
return r;
@@ -1953,42 +1956,60 @@ static int amdgpu_ttm_mmio_remap_bo_init(struct amdgpu_device *adev)
if (r)
goto err_unref;
tbo = &adev->rmmio_remap.bo->tbo;
/*
* MMIO_REMAP is a fixed I/O placement (AMDGPU_PL_MMIO_REMAP).
* Use TTM-level pin so the BO cannot be evicted/migrated,
* independent of GEM domains. This
* enforces the “fixed I/O window”
*/
ttm_bo_pin(&adev->rmmio_remap.bo->tbo);
placement.num_placement = 1;
placement.placement = &placements;
placements.fpfn = 0;
placements.lpfn = 0;
placements.mem_type = AMDGPU_PL_MMIO_REMAP;
placements.flags = 0;
/* Force the BO into the fixed MMIO_REMAP placement */
r = ttm_bo_mem_space(tbo, &placement, &tmp, &ctx);
if (unlikely(r))
goto err_unlock;
ttm_resource_free(tbo, &tbo->resource);
ttm_bo_assign_mem(tbo, tmp);
ttm_bo_pin(tbo);
amdgpu_bo_unreserve(adev->rmmio_remap.bo);
return 0;
err_unlock:
amdgpu_bo_unreserve(adev->rmmio_remap.bo);
err_unref:
if (adev->rmmio_remap.bo)
amdgpu_bo_unref(&adev->rmmio_remap.bo);
amdgpu_bo_unref(&adev->rmmio_remap.bo);
adev->rmmio_remap.bo = NULL;
return r;
}
/**
* amdgpu_ttm_mmio_remap_bo_fini - Free the singleton MMIO_REMAP BO
* amdgpu_ttm_free_mmio_remap_bo - Free the singleton MMIO_REMAP BO
* @adev: amdgpu device
*
* Frees the kernel-owned MMIO_REMAP BO if it was allocated by
* amdgpu_ttm_mmio_remap_bo_init().
*/
static void amdgpu_ttm_mmio_remap_bo_fini(struct amdgpu_device *adev)
static void amdgpu_ttm_free_mmio_remap_bo(struct amdgpu_device *adev)
{
struct amdgpu_bo *bo = adev->rmmio_remap.bo;
if (!bo)
return; /* <-- safest early exit */
if (!adev->rmmio_remap.bo)
return;
if (!amdgpu_bo_reserve(adev->rmmio_remap.bo, true)) {
ttm_bo_unpin(&adev->rmmio_remap.bo->tbo);
amdgpu_bo_unreserve(adev->rmmio_remap.bo);
}
/*
* At this point we rely on normal DRM teardown ordering:
* no new user ioctls can access the global MMIO_REMAP BO
* once TTM teardown begins.
*/
amdgpu_bo_unref(&adev->rmmio_remap.bo);
adev->rmmio_remap.bo = NULL;
}
@@ -2172,8 +2193,8 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
return r;
}
/* Allocate the singleton MMIO_REMAP BO (4K) if supported */
r = amdgpu_ttm_mmio_remap_bo_init(adev);
/* Allocate the singleton MMIO_REMAP BO if supported */
r = amdgpu_ttm_alloc_mmio_remap_bo(adev);
if (r)
return r;
@@ -2241,7 +2262,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
&adev->mman.sdma_access_ptr);
amdgpu_ttm_mmio_remap_bo_fini(adev);
amdgpu_ttm_free_mmio_remap_bo(adev);
amdgpu_ttm_fw_reserve_vram_fini(adev);
amdgpu_ttm_drv_reserve_vram_fini(adev);