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dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT SSWI

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Add SSWI support for Anlogic DR1V90 SoC, which uses Nuclei UX900 with a
TIMER unit compliant with the ACLINT specification.

Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20251021-dr1v90-basic-dt-v3-6-5478db4f664a@pigmoral.tech
This commit is contained in:
Junhui Liu
2025-10-21 17:41:41 +08:00
committed by Thomas Gleixner
parent 579951da64
commit a1c3a7d7ee
1 changed files with 4 additions and 0 deletions
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4
Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
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@@ -30,6 +30,10 @@ properties:
- const: thead,c900-aclint-sswi
- items:
- const: mips,p8700-aclint-sswi
- items:
- enum:
- anlogic,dr1v90-aclint-sswi
- const: nuclei,ux900-aclint-sswi
reg:
maxItems: 1