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selftests/powerpc/pmu/: Add interface test for mmcr0_cc56run field

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The testcase uses event code 0x500fa ("instructions") to check the
CC56RUN bit setting in Monitor Mode Control Register 0(MMCR0). In ISA
v3.1 platform, this bit is expected to be set in MMCR0 when using
Performance Monitor Counter 5 and 6 (PMC5 and PMC6). Verify this is done
correctly by perf interface.

CC56RUN bit makes PMC5 and PMC6 count regardless of the run latch state.
This bit is set in power10 since PMC5 and PMC6 is used in power10 for
counting instructions and cycles. Hence added a check to skip this test
in other platforms

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
[mpe: Add error checking, drop GET_MMCR_FIELD, add to .gitignore]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220127072012.662451-11-kjain@linux.ibm.com
This commit is contained in:
Athira Rajeev
2022-01-27 12:50:02 +05:30
committed by Michael Ellerman
parent eb7aa044df
commit a7c0ab2e61
3 changed files with 61 additions and 1 deletions
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1
tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore vendored
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@@ -1 +1,2 @@
mmcr0_exceptionbits_test
mmcr0_cc56run_test