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drm/amd/display: Remove dc_target object
dc_target does not fit well into DRM framework so removed it. This will prevent the driver from leveraging the pipe-split code for tiled displays, so will have to be handled at a higher level. Most places that used dc_target now directly use dc_stream instead. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -68,12 +68,12 @@ static u32 dm_vblank_get_counter(struct amdgpu_device *adev, int crtc)
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else {
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struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc];
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if (NULL == acrtc->target) {
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DRM_ERROR("dc_target is NULL for crtc '%d'!\n", crtc);
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if (NULL == acrtc->stream) {
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DRM_ERROR("dc_stream is NULL for crtc '%d'!\n", crtc);
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return 0;
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}
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return dc_target_get_vblank_counter(acrtc->target);
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return dc_stream_get_vblank_counter(acrtc->stream);
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}
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}
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@@ -85,12 +85,12 @@ static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,
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else {
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struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc];
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if (NULL == acrtc->target) {
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DRM_ERROR("dc_target is NULL for crtc '%d'!\n", crtc);
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if (NULL == acrtc->stream) {
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DRM_ERROR("dc_stream is NULL for crtc '%d'!\n", crtc);
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return 0;
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}
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return dc_target_get_scanoutpos(acrtc->target, vbl, position);
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return dc_stream_get_scanoutpos(acrtc->stream, vbl, position);
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}
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return 0;
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@@ -461,7 +461,7 @@ static int dm_suspend(void *handle)
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drm_modeset_lock_all(adev->ddev);
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list_for_each_entry(crtc, &adev->ddev->mode_config.crtc_list, head) {
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struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
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if (acrtc->target)
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if (acrtc->stream)
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drm_crtc_vblank_off(crtc);
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}
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drm_modeset_unlock_all(adev->ddev);
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@@ -655,7 +655,7 @@ int amdgpu_dm_display_resume(struct amdgpu_device *adev )
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drm_modeset_lock_all(ddev);
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list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {
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struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
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if (acrtc->target)
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if (acrtc->stream)
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drm_crtc_vblank_on(crtc);
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}
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drm_modeset_unlock_all(ddev);
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@@ -740,7 +740,7 @@ void amdgpu_dm_update_connector_after_detect(
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if (aconnector->base.force != DRM_FORCE_UNSPECIFIED
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&& aconnector->dc_em_sink) {
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/* For S3 resume with headless use eml_sink to fake target
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/* For S3 resume with headless use eml_sink to fake stream
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* because on resume connecotr->sink is set ti NULL
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*/
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mutex_lock(&dev->mode_config.mutex);
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@@ -1184,7 +1184,7 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
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return -1;
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}
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for (i = 0; i < dm->dc->caps.max_targets; i++) {
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for (i = 0; i < dm->dc->caps.max_streams; i++) {
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acrtc = kzalloc(sizeof(struct amdgpu_crtc), GFP_KERNEL);
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if (!acrtc)
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goto fail;
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@@ -1199,7 +1199,7 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
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}
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}
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dm->display_indexes_num = dm->dc->caps.max_targets;
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dm->display_indexes_num = dm->dc->caps.max_streams;
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/* loops over all connectors on the board */
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for (i = 0; i < link_cnt; i++) {
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@@ -1318,7 +1318,7 @@ static void dm_page_flip(struct amdgpu_device *adev,
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int crtc_id, u64 crtc_base, bool async)
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{
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struct amdgpu_crtc *acrtc;
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struct dc_target *target;
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const struct dc_stream *stream;
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struct dc_flip_addrs addr = { {0} };
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/*
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@@ -1336,7 +1336,7 @@ static void dm_page_flip(struct amdgpu_device *adev,
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* a little longer to lock up all cores.
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*
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* The reason we should lock on dal_mutex is so that we can be sure
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* nobody messes with acrtc->target after we read and check its value.
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* nobody messes with acrtc->stream after we read and check its value.
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*
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* We might be able to fix our concurrency issues with a work queue
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* where we schedule all work items (mode_set, page_flip, etc.) and
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@@ -1345,14 +1345,14 @@ static void dm_page_flip(struct amdgpu_device *adev,
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*/
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acrtc = adev->mode_info.crtcs[crtc_id];
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target = acrtc->target;
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stream = acrtc->stream;
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/*
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* Received a page flip call after the display has been reset.
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* Just return in this case. Everything should be clean-up on reset.
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*/
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if (!target) {
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if (!stream) {
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WARN_ON(1);
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return;
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}
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@@ -1368,7 +1368,7 @@ static void dm_page_flip(struct amdgpu_device *adev,
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dc_flip_surface_addrs(
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adev->dm.dc,
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dc_target_get_status(target)->surfaces,
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dc_stream_get_status(stream)->surfaces,
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&addr, 1);
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}
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@@ -1376,25 +1376,22 @@ static int amdgpu_notify_freesync(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct mod_freesync_params freesync_params;
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uint8_t num_targets;
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uint8_t num_streams;
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uint8_t i;
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struct dc_target *target;
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struct amdgpu_device *adev = dev->dev_private;
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int r = 0;
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/* Get freesync enable flag from DRM */
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num_targets = dc_get_current_target_count(adev->dm.dc);
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num_streams = dc_get_current_stream_count(adev->dm.dc);
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for (i = 0; i < num_targets; i++) {
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target = dc_get_target_at_index(adev->dm.dc, i);
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for (i = 0; i < num_streams; i++) {
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const struct dc_stream *stream;
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stream = dc_get_stream_at_index(adev->dm.dc, i);
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mod_freesync_update_state(adev->dm.freesync_module,
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target->streams,
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target->stream_count,
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&freesync_params);
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&stream, 1, &freesync_params);
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}
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return r;
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