bybrooklyn/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-05 23:05:25 -04:00
Code Issues Packages Projects Releases Wiki Activity

drm/amd/pm: Add debug bit for smu pool allocation

Browse Source 
In certain cases, it's desirable to avoid PMFW log transactions to
system memory. Add a mask bit to decide whether to allocate smu pool in
device memory or system memory.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar
2025-03-07 11:11:23 +05:30
committed by Alex Deucher
parent 3b669df92c
commit ab6893402a
3 changed files with 11 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
View File

@@ -139,6 +139,7 @@ enum AMDGPU_DEBUG_MASK {
AMDGPU_DEBUG_ENABLE_RAS_ACA = BIT(4),
AMDGPU_DEBUG_ENABLE_EXP_RESETS = BIT(5),
AMDGPU_DEBUG_DISABLE_GPU_RING_RESET = BIT(6),
AMDGPU_DEBUG_SMU_POOL = BIT(7),
};
unsigned int amdgpu_vram_limit = UINT_MAX;
@@ -2238,6 +2239,10 @@ static void amdgpu_init_debug_options(struct amdgpu_device *adev)
pr_info("debug: ring reset disabled\n");
adev->debug_disable_gpu_ring_reset = true;
}
if (amdgpu_debug_mask & AMDGPU_DEBUG_SMU_POOL) {
pr_info("debug: use vram for smu pool\n");
adev->pm.smu_debug_mask |= SMU_DEBUG_POOL_USE_VRAM;
}
}
static unsigned long amdgpu_fix_asic_type(struct pci_dev *pdev, unsigned long flags)

3
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
View File

@@ -295,7 +295,8 @@ enum ip_power_state {
};
/* Used to mask smu debug modes */
#define SMU_DEBUG_HALT_ON_ERROR 0x1
#define SMU_DEBUG_HALT_ON_ERROR BIT(0)
#define SMU_DEBUG_POOL_USE_VRAM BIT(1)
#define MAX_SMU_I2C_BUSES 2

5
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
View File

@@ -1027,7 +1027,10 @@ static int smu_alloc_memory_pool(struct smu_context *smu)
memory_pool->size = pool_size;
memory_pool->align = PAGE_SIZE;
memory_pool->domain = AMDGPU_GEM_DOMAIN_GTT;
memory_pool->domain =
(adev->pm.smu_debug_mask & SMU_DEBUG_POOL_USE_VRAM) ?
AMDGPU_GEM_DOMAIN_VRAM :
AMDGPU_GEM_DOMAIN_GTT;
switch (pool_size) {
case SMU_MEMORY_POOL_SIZE_256_MB: