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Merge drm/drm-next into drm-misc-next
Maíra needs a backmerge to apply v3d patches, and Danilo for some nouveau patches. Signed-off-by: Maxime Ripard <mripard@kernel.org>
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@@ -623,8 +623,7 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
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return r;
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if (!amdgpu_gmc_vram_full_visible(&adev->gmc) &&
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bo->tbo.resource->mem_type == TTM_PL_VRAM &&
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amdgpu_bo_in_cpu_visible_vram(bo))
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amdgpu_res_cpu_visible(adev, bo->tbo.resource))
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amdgpu_cs_report_moved_bytes(adev, ctx.bytes_moved,
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ctx.bytes_moved);
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else
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@@ -1278,23 +1277,25 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, bool evict)
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void amdgpu_bo_get_memory(struct amdgpu_bo *bo,
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struct amdgpu_mem_stats *stats)
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{
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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struct ttm_resource *res = bo->tbo.resource;
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uint64_t size = amdgpu_bo_size(bo);
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struct drm_gem_object *obj;
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unsigned int domain;
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bool shared;
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/* Abort if the BO doesn't currently have a backing store */
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if (!bo->tbo.resource)
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if (!res)
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return;
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obj = &bo->tbo.base;
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shared = drm_gem_object_is_shared_for_memory_stats(obj);
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domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
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domain = amdgpu_mem_type_to_domain(res->mem_type);
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switch (domain) {
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case AMDGPU_GEM_DOMAIN_VRAM:
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stats->vram += size;
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if (amdgpu_bo_in_cpu_visible_vram(bo))
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if (amdgpu_res_cpu_visible(adev, bo->tbo.resource))
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stats->visible_vram += size;
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if (shared)
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stats->vram_shared += size;
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@@ -1396,10 +1397,7 @@ vm_fault_t amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
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/* Remember that this BO was accessed by the CPU */
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abo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
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if (bo->resource->mem_type != TTM_PL_VRAM)
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return 0;
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if (amdgpu_bo_in_cpu_visible_vram(abo))
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if (amdgpu_res_cpu_visible(adev, bo->resource))
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return 0;
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/* Can't move a pinned BO to visible VRAM */
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@@ -1422,7 +1420,7 @@ vm_fault_t amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
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/* this should never happen */
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if (bo->resource->mem_type == TTM_PL_VRAM &&
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!amdgpu_bo_in_cpu_visible_vram(abo))
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!amdgpu_res_cpu_visible(adev, bo->resource))
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return VM_FAULT_SIGBUS;
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ttm_bo_move_to_lru_tail_unlocked(bo);
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@@ -1586,6 +1584,7 @@ uint32_t amdgpu_bo_get_preferred_domain(struct amdgpu_device *adev,
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*/
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u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)
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{
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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struct dma_buf_attachment *attachment;
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struct dma_buf *dma_buf;
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const char *placement;
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@@ -1594,10 +1593,11 @@ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)
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if (dma_resv_trylock(bo->tbo.base.resv)) {
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unsigned int domain;
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domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
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switch (domain) {
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case AMDGPU_GEM_DOMAIN_VRAM:
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if (amdgpu_bo_in_cpu_visible_vram(bo))
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if (amdgpu_res_cpu_visible(adev, bo->tbo.resource))
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placement = "VRAM VISIBLE";
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else
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placement = "VRAM";
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