drm/amdgpu/mes: add multi-xcc support

a. extend mes pipe instances to num_xcc * max_mes_pipe
b. initialize mes schq/kiq pipes per xcc
c. submit mes packet to mes ring according to xcc_id

v2: rebase (Alex)

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jack Xiao
2024-11-21 16:22:38 +08:00
committed by Alex Deucher
parent 2718942f48
commit d09c7e266c
13 changed files with 158 additions and 108 deletions

View File

@@ -223,7 +223,7 @@ static int mes_userq_detect_and_reset(struct amdgpu_device *adev,
amdgpu_mes_lock(&adev->mes);
r = amdgpu_mes_detect_and_reset_hung_queues(adev, queue_type, false,
&hung_db_num, db_array);
&hung_db_num, db_array, 0);
amdgpu_mes_unlock(&adev->mes);
if (r) {
dev_err(adev->dev, "Failed to detect and reset queues, err (%d)\n", r);