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drm/i915/icl: Configure DSI transcoders

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This patch programs DSI operation mode, pixel format,
BGR info, link calibration etc for the DSI transcoder.
This patch also extract BGR info of the DSI panel from
VBT and save it inside struct intel_dsi which used for
configuring DSI transcoder.

v2: Rebase
v3: Use newly defined bitfields.

v4 by Jani:
 - Use intel_dsi_bitrate()
 - Make bgr_enabled bool
 - Use 0 instead of 0x0
 - Replace DRM_ERROR() with MISSING_CASE() on pixel format and video mode
 - Use is_vid_mode()

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7de4e39a4b2a18e53a2b9d9cea5b5b4c9d6eeb34.1539613303.git.jani.nikula@intel.com
This commit is contained in:
Madhav Chauhan
2018-10-15 17:27:59 +03:00
committed by Jani Nikula
parent 5ffce25462
commit d364dc66e2
3 changed files with 90 additions and 1 deletions
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1
drivers/gpu/drm/i915/intel_dsi_vbt.c
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@@ -805,6 +805,7 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id)
intel_dsi->bw_timer = mipi_config->dbi_bw_timer;
intel_dsi->video_frmt_cfg_bits =
mipi_config->bta_enabled ? DISABLE_VIDEO_BTA : 0;
intel_dsi->bgr_enabled = mipi_config->rgb_flip;
/* Starting point, adjusted depending on dual link and burst mode */
intel_dsi->pclk = mode->clock;