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selftests/powerpc/pmu/: Add interface test for mmcr0_fc56 field using pmc1

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The testcase uses event code 0x1001e to verify two bit settings (FC5-6
and PMC1CE) in Monitor Mode Control Register 0 (MMCR0). Check if FC5-6
bit to be set in MMCR0 when not using Performance Monitor Counter 5 and
6 (PMC5 and PMC6). And also PMC1CE is expected to be set when using
PMC1. Test if these fields are programmed correctly via perf interface.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
[mpe: Add error checking, drop GET_MMCR_FIELD, add to .gitignore]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220127072012.662451-14-kjain@linux.ibm.com
This commit is contained in:
Athira Rajeev
2022-01-27 12:50:05 +05:30
committed by Michael Ellerman
parent 9ac7c6d5e4
commit d5172f2585
3 changed files with 61 additions and 1 deletions
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tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore vendored
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@@ -2,3 +2,4 @@ mmcr0_exceptionbits_test
mmcr0_cc56run_test
mmcr0_pmccext_test
mmcr0_pmcjce_test
mmcr0_fc56_pmc1ce_test