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Merge tag 'juno-updates-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt
Armv8 Juno/FVP/Vexpress updates for v7.1 1. The primary addition is initial support for Zena CSS that includes: a new binding compatibility, a shared `zena-css.dtsi` description, and an FVP device tree. 2. Extension of Corstone-1000 FVP platform support with binding updates to add the new `arm,corstone1000-a320-fvp` platform, and the `arm,corstone1000-ethos-u85` NPU integration. Overall, this combines new platform enablement with some DTS layout cleanup for Arm reference FVP based systems. * tag 'juno-updates-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: arm/corstone1000: Add corstone-1000-a320 arm64: dts: arm/corstone1000: Move FVP peripherals to separate .dtsi arm64: dts: arm/corstone1000: Move cpu nodes dt-bindings: npu: arm,ethos: Add "arm,corstone1000-ethos-u85" dt-bindings: arm,corstone1000: Add "arm,corstone1000-a320-fvp" arm64: dts: zena: Move SRAM into SoC and memory node out of SoC arm64: dts: zena: Add support for Zena CSS dt-bindings: arm: Add Zena CSS compatibility Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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@@ -15,11 +15,11 @@ description: |+
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provides a flexible compute architecture that combines Cortex‑A and Cortex‑M
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processors.
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Support for Cortex‑A32, Cortex‑A35 and Cortex‑A53 processors. Two expansion
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systems for M-Class (or other) processors for adding sensors, connectivity,
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video, audio and machine learning at the edge System and security IPs to build
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a secure SoC for a range of rich IoT applications, for example gateways, smart
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cameras and embedded systems.
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Support for Cortex‑A32, Cortex‑A35, Cortex‑A53 and Cortex-A320 processors.
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Two expansion systems for M-Class (or other) processors for adding sensors,
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connectivity, video, audio and machine learning at the edge System and
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security IPs to build a secure SoC for a range of rich IoT applications, for
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example gateways, smart cameras and embedded systems.
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Integrated Secure Enclave providing hardware Root of Trust and supporting
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seamless integration of the optional CryptoCell™-312 cryptographic
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@@ -39,6 +39,11 @@ properties:
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implementation of this system. See ARM ecosystems FVP's.
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items:
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- const: arm,corstone1000-fvp
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- description: Corstone1000-A320 FVP is the Fixed Virtual Platform
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implementation of this system with Cortex-A320 cores and Ethos-U85
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NPU. See ARM ecosystems FVP's.
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items:
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- const: arm,corstone1000-a320-fvp
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additionalProperties: true
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@@ -119,6 +119,16 @@ properties:
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items:
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- const: arm,foundation-aarch64
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- const: arm,vexpress
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- description: Arm Zena Compute Subsystem Platforms
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Arm Zena Compute Subsystem (CSS) is a compute platform targeting
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the automotive sector. Arm Zena CSS is a high-performance Arm
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Cortex-A720AE Application Processor system augmented with an Arm
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Cortex-R82AE based Safety Island and real-time domain.
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items:
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- enum:
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- arm,zena-css-fvp
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- const: arm,zena-css
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- const: arm,vexpress
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arm,vexpress,position:
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description: When daughterboards are stacked on one site, their position
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