drm/amd: Convert DRM_*() to drm_*()

The drm_*() macros include the device which is helpful for debugging
issues in multi-GPU systems.

Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mario Limonciello (AMD)
2025-12-14 19:12:27 -06:00
committed by Alex Deucher
parent 5fd4fef3f8
commit e291729873
61 changed files with 209 additions and 176 deletions

View File

@@ -438,18 +438,21 @@ int amdgpu_ctx_get_entity(struct amdgpu_ctx *ctx, u32 hw_ip, u32 instance,
struct drm_sched_entity *ctx_entity;
if (hw_ip >= AMDGPU_HW_IP_NUM) {
DRM_ERROR("unknown HW IP type: %d\n", hw_ip);
drm_err(adev_to_drm(ctx->mgr->adev),
"unknown HW IP type: %d\n", hw_ip);
return -EINVAL;
}
/* Right now all IPs have only one instance - multiple rings. */
if (instance != 0) {
DRM_DEBUG("invalid ip instance: %d\n", instance);
drm_dbg(adev_to_drm(ctx->mgr->adev),
"invalid ip instance: %d\n", instance);
return -EINVAL;
}
if (ring >= amdgpu_ctx_num_entities[hw_ip]) {
DRM_DEBUG("invalid ring: %d %d\n", hw_ip, ring);
drm_dbg(adev_to_drm(ctx->mgr->adev),
"invalid ring: %d %d\n", hw_ip, ring);
return -EINVAL;
}
@@ -874,7 +877,8 @@ int amdgpu_ctx_wait_prev_fence(struct amdgpu_ctx *ctx,
r = dma_fence_wait(other, true);
if (r < 0 && r != -ERESTARTSYS)
DRM_ERROR("Error (%ld) waiting for fence!\n", r);
drm_err(adev_to_drm(ctx->mgr->adev),
"AMDGPU: Error waiting for fence in ctx %p\n", ctx);
dma_fence_put(other);
return r;
@@ -929,7 +933,7 @@ static void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr)
idr_for_each_entry(idp, ctx, id) {
if (kref_read(&ctx->refcount) != 1) {
DRM_ERROR("ctx %p is still alive\n", ctx);
drm_err(adev_to_drm(mgr->adev), "ctx %p is still alive\n", ctx);
continue;
}