Merge tag 'devicetree-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "DT core:

   - Cleanup of the reserved memory code to keep CMA specifics in CMA
     code

   - Add and convert several users to new of_machine_get_match() helper

   - Validate nul termination in string properties

   - Update dtc to upstream v1.7.2-69-g53373d135579

   - Limit matching reserved memory devices to /reserved-memory nodes

   - Fix some UAF in unittests

   - Remove Baikal SoC bus driver

   - Fix false DT_SPLIT_BINDING_PATCH checkpatch warning

   - Allow fw_devlink device-tree on x86

   - Fix kerneldoc return description for of_property_count_elems_of_size()

  DT bindings:

   - Add fsl,imx25-aips, fsl,imx25-tcq, qcom,eliza-pdc,
     qcom,eliza-spmi-pmic-arb, qcom,hawi-imem, qcom,milos-imem,
     qcom,hawi-pdc, and lg,sw49410 bindings

   - Convert arm,vexpress-scc to DT schema

   - Deprecate Qualcomm generic CPU compatibles. Add Apple M3 CPU cores.

   - Move some dual-link display panels to the dual-link schema

   - Drop mux controller node name constraints

   - Remove Baikal SoC bus bindings

   - Fix a false warning in the thermal trip node binding"

* tag 'devicetree-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits)
  dt-bindings: display: panel: panel-simple: Add lg,sw49410 compatible
  dt-bindings: display: ti, am65x-dss: Fix AM62L DSS reg and clock constraints
  dt-bindings: display: simple: Move Innolux G156HCE-L01 panel to dual-link
  dt-bindings: display: simple: Move AUO 21.5" FHD to dual-link
  dt-bindings: thermal: Fix false warning with 'phandle' in trips nodes
  of: unittest: fix use-after-free in testdrv_probe()
  of: unittest: fix use-after-free in of_unittest_changeset()
  dt-bindings: qcom,pdc: document the Hawi Power Domain Controller
  dt-bindings: ARM: arm,vexpress-scc: convert to DT schema
  drivers/of: fdt: validate flat DT string properties before string use
  drivers/of: fdt: validate stdout-path properties before parsing them
  dt-bindings: sram: Document qcom,hawi-imem compatible
  dt-bindings: sram: Allow multiple-word prefixes to sram subnode
  dt-bindings: sram: Document qcom,milos-imem
  scripts/dtc: Update to upstream version v1.7.2-69-g53373d135579
  of: property: Allow fw_devlink device-tree on x86
  dt-bindings: arm: cpus: Add Apple M3 CPU core compatibles
  dt-bindings: display: lt8912b: Drop redundant endpoint properties
  dt-bindings: opp-v2: Fix example 3 CPU reg value
  dt-bindings: connector: add pd-disable dependency
  ...
This commit is contained in:
Linus Torvalds
2026-04-17 14:09:02 -07:00
42 changed files with 508 additions and 1332 deletions

View File

@@ -0,0 +1,53 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/arm,vexpress-scc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Versatile Express Serial Configuration Controller
maintainers:
- Liviu Dudau <liviu.dudau@arm.com>
- Sudeep Holla <sudeep.holla@arm.com>
description: |
Test chips for ARM Versatile Express platform implement SCC (Serial
Configuration Controller) interface, used to set initial conditions
for the test chip.
In some cases its registers are also mapped in normal address space
and can be used to obtain runtime information about the chip internals
(like silicon temperature sensors) and as interface to other subsystems
like platform configuration control and power management.
properties:
compatible:
items:
- enum:
- arm,vexpress-scc,v2p-ca15_a7
- const: arm,vexpress-scc
reg:
maxItems: 1
interrupts:
maxItems: 1
required:
- compatible
additionalProperties: false
examples:
- |
bus {
#address-cells = <2>;
#size-cells = <2>;
scc@7fff0000 {
compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
reg = <0 0x7fff0000 0 0x1000>;
interrupts = <0 95 4>;
};
};
...

View File

@@ -79,156 +79,162 @@ properties:
All other bits in the reg cells must be set to 0. All other bits in the reg cells must be set to 0.
compatible: compatible:
enum: oneOf:
- apm,potenza - enum:
- apm,strega - apm,potenza
- apple,avalanche - apm,strega
- apple,blizzard - apple,avalanche
- apple,cyclone - apple,blizzard
- apple,firestorm - apple,cyclone
- apple,hurricane-zephyr - apple,everest
- apple,icestorm - apple,firestorm
- apple,mistral - apple,hurricane-zephyr
- apple,monsoon - apple,icestorm
- apple,twister - apple,mistral
- apple,typhoon - apple,monsoon
- arm,arm710t - apple,sawtooth
- arm,arm720t - apple,twister
- arm,arm740t - apple,typhoon
- arm,arm7ej-s - arm,arm710t
- arm,arm7tdmi - arm,arm720t
- arm,arm7tdmi-s - arm,arm740t
- arm,arm9es - arm,arm7ej-s
- arm,arm9ej-s - arm,arm7tdmi
- arm,arm920t - arm,arm7tdmi-s
- arm,arm922t - arm,arm9es
- arm,arm925 - arm,arm9ej-s
- arm,arm926e-s - arm,arm920t
- arm,arm926ej-s - arm,arm922t
- arm,arm940t - arm,arm925
- arm,arm946e-s - arm,arm926e-s
- arm,arm966e-s - arm,arm926ej-s
- arm,arm968e-s - arm,arm940t
- arm,arm9tdmi - arm,arm946e-s
- arm,arm1020e - arm,arm966e-s
- arm,arm1020t - arm,arm968e-s
- arm,arm1022e - arm,arm9tdmi
- arm,arm1026ej-s - arm,arm1020e
- arm,arm1136j-s - arm,arm1020t
- arm,arm1136jf-s - arm,arm1022e
- arm,arm1156t2-s - arm,arm1026ej-s
- arm,arm1156t2f-s - arm,arm1136j-s
- arm,arm1176jzf - arm,arm1136jf-s
- arm,arm1176jz-s - arm,arm1156t2-s
- arm,arm1176jzf-s - arm,arm1156t2f-s
- arm,arm11mpcore - arm,arm1176jzf
- arm,armv8 # Only for s/w models - arm,arm1176jz-s
- arm,c1-nano - arm,arm1176jzf-s
- arm,c1-premium - arm,arm11mpcore
- arm,c1-pro - arm,armv8 # Only for s/w models
- arm,c1-ultra - arm,c1-nano
- arm,cortex-a5 - arm,c1-premium
- arm,cortex-a7 - arm,c1-pro
- arm,cortex-a8 - arm,c1-ultra
- arm,cortex-a9 - arm,cortex-a5
- arm,cortex-a12 - arm,cortex-a7
- arm,cortex-a15 - arm,cortex-a8
- arm,cortex-a17 - arm,cortex-a9
- arm,cortex-a32 - arm,cortex-a12
- arm,cortex-a34 - arm,cortex-a15
- arm,cortex-a35 - arm,cortex-a17
- arm,cortex-a53 - arm,cortex-a32
- arm,cortex-a55 - arm,cortex-a34
- arm,cortex-a57 - arm,cortex-a35
- arm,cortex-a65 - arm,cortex-a53
- arm,cortex-a72 - arm,cortex-a55
- arm,cortex-a73 - arm,cortex-a57
- arm,cortex-a75 - arm,cortex-a65
- arm,cortex-a76 - arm,cortex-a72
- arm,cortex-a77 - arm,cortex-a73
- arm,cortex-a78 - arm,cortex-a75
- arm,cortex-a78ae - arm,cortex-a76
- arm,cortex-a78c - arm,cortex-a77
- arm,cortex-a320 - arm,cortex-a78
- arm,cortex-a510 - arm,cortex-a78ae
- arm,cortex-a520 - arm,cortex-a78c
- arm,cortex-a520ae - arm,cortex-a320
- arm,cortex-a710 - arm,cortex-a510
- arm,cortex-a715 - arm,cortex-a520
- arm,cortex-a720 - arm,cortex-a520ae
- arm,cortex-a720ae - arm,cortex-a710
- arm,cortex-a725 - arm,cortex-a715
- arm,cortex-m0 - arm,cortex-a720
- arm,cortex-m0+ - arm,cortex-a720ae
- arm,cortex-m1 - arm,cortex-a725
- arm,cortex-m3 - arm,cortex-m0
- arm,cortex-m4 - arm,cortex-m0+
- arm,cortex-r4 - arm,cortex-m1
- arm,cortex-r5 - arm,cortex-m3
- arm,cortex-r7 - arm,cortex-m4
- arm,cortex-r52 - arm,cortex-r4
- arm,cortex-x1 - arm,cortex-r5
- arm,cortex-x1c - arm,cortex-r7
- arm,cortex-x2 - arm,cortex-r52
- arm,cortex-x3 - arm,cortex-x1
- arm,cortex-x4 - arm,cortex-x1c
- arm,cortex-x925 - arm,cortex-x2
- arm,neoverse-e1 - arm,cortex-x3
- arm,neoverse-n1 - arm,cortex-x4
- arm,neoverse-n2 - arm,cortex-x925
- arm,neoverse-n3 - arm,neoverse-e1
- arm,neoverse-v1 - arm,neoverse-n1
- arm,neoverse-v2 - arm,neoverse-n2
- arm,neoverse-v3 - arm,neoverse-n3
- arm,neoverse-v3ae - arm,neoverse-v1
- arm,rainier - arm,neoverse-v2
- brcm,brahma-b15 - arm,neoverse-v3
- brcm,brahma-b53 - arm,neoverse-v3ae
- brcm,vulcan - arm,rainier
- cavium,thunder - brcm,brahma-b15
- cavium,thunder2 - brcm,brahma-b53
- faraday,fa526 - brcm,vulcan
- intel,sa110 - cavium,thunder
- intel,sa1100 - cavium,thunder2
- marvell,feroceon - faraday,fa526
- marvell,mohawk - intel,sa110
- marvell,pj4a - intel,sa1100
- marvell,pj4b - marvell,feroceon
- marvell,sheeva-v5 - marvell,mohawk
- marvell,sheeva-v7 - marvell,pj4a
- nvidia,tegra132-denver - marvell,pj4b
- nvidia,tegra186-denver - marvell,sheeva-v5
- nvidia,tegra194-carmel - marvell,sheeva-v7
- qcom,krait - nvidia,tegra132-denver
- qcom,kryo - nvidia,tegra186-denver
- qcom,kryo240 - nvidia,tegra194-carmel
- qcom,kryo250 - qcom,krait
- qcom,kryo260 - qcom,kryo240
- qcom,kryo280 - qcom,kryo250
- qcom,kryo360 - qcom,kryo260
- qcom,kryo385 - qcom,kryo280
- qcom,kryo465 - qcom,kryo360
- qcom,kryo468 - qcom,kryo385
- qcom,kryo470 - qcom,kryo465
- qcom,kryo485 - qcom,kryo468
- qcom,kryo560 - qcom,kryo470
- qcom,kryo570 - qcom,kryo485
- qcom,kryo660 - qcom,kryo560
- qcom,kryo670 - qcom,kryo570
- qcom,kryo685 - qcom,kryo660
- qcom,kryo780 - qcom,kryo670
- qcom,oryon - qcom,kryo685
- qcom,oryon-1-1 - qcom,kryo780
- qcom,oryon-1-2 - qcom,oryon-1-1
- qcom,oryon-1-3 - qcom,oryon-1-2
- qcom,oryon-1-4 - qcom,oryon-1-3
- qcom,oryon-2-1 - qcom,oryon-1-4
- qcom,oryon-2-2 - qcom,oryon-2-1
- qcom,oryon-2-3 - qcom,oryon-2-2
- qcom,scorpion - qcom,oryon-2-3
- samsung,mongoose-m2 - qcom,scorpion
- samsung,mongoose-m3 - samsung,mongoose-m2
- samsung,mongoose-m5 - samsung,mongoose-m3
- samsung,mongoose-m5
- enum:
- qcom,kryo
- qcom,oryon
# Too generic, do not use in new code
deprecated: true
enable-method: enable-method:
$ref: /schemas/types.yaml#/definitions/string $ref: /schemas/types.yaml#/definitions/string

View File

@@ -15,6 +15,7 @@ properties:
compatible: compatible:
oneOf: oneOf:
- enum: - enum:
- fsl,imx25-aips
- fsl,imx51-m4if - fsl,imx51-m4if
- fsl,imx51-tigerp - fsl,imx51-tigerp
- fsl,imx51-aipstz - fsl,imx51-aipstz

View File

@@ -1,33 +0,0 @@
ARM Versatile Express Serial Configuration Controller
-----------------------------------------------------
Test chips for ARM Versatile Express platform implement SCC (Serial
Configuration Controller) interface, used to set initial conditions
for the test chip.
In some cases its registers are also mapped in normal address space
and can be used to obtain runtime information about the chip internals
(like silicon temperature sensors) and as interface to other subsystems
like platform configuration control and power management.
Required properties:
- compatible value: "arm,vexpress-scc,<model>", "arm,vexpress-scc";
where <model> is the full tile model name (as used
in the tile's Technical Reference Manual),
eg. for Coretile Express A15x2 A7x3 (V2P-CA15_A7):
compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
Optional properties:
- reg: when the SCC is memory mapped, physical address and size of the
registers window
- interrupts: when the SCC can generate a system-level interrupt
Example:
scc@7fff0000 {
compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
reg = <0 0x7fff0000 0 0x1000>;
interrupts = <0 95 4>;
};

View File

@@ -1,90 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/baikal,bt1-apb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Baikal-T1 APB-bus
maintainers:
- Serge Semin <fancer.lancer@gmail.com>
description: |
Baikal-T1 CPU or DMAC MMIO requests are handled by the AMBA 3 AXI Interconnect
which routes them to the AXI-APB bridge. This interface is a single master
multiple slaves bus in turn serializing IO accesses and routing them to the
addressed APB slave devices. In case of any APB protocol collisions, slave
device not responding on timeout an IRQ is raised with an erroneous address
reported to the APB terminator (APB Errors Handler Block).
allOf:
- $ref: /schemas/simple-bus.yaml#
properties:
compatible:
contains:
const: baikal,bt1-apb
reg:
items:
- description: APB EHB MMIO registers
- description: APB MMIO region with no any device mapped
reg-names:
items:
- const: ehb
- const: nodev
interrupts:
maxItems: 1
clocks:
items:
- description: APB reference clock
clock-names:
items:
- const: pclk
resets:
items:
- description: APB domain reset line
reset-names:
items:
- const: prst
unevaluatedProperties: false
required:
- compatible
- reg
- reg-names
- interrupts
- clocks
- clock-names
examples:
- |
#include <dt-bindings/interrupt-controller/mips-gic.h>
bus@1f059000 {
compatible = "baikal,bt1-apb", "simple-bus";
reg = <0x1f059000 0x1000>,
<0x1d000000 0x2040000>;
reg-names = "ehb", "nodev";
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu_sys 1>;
clock-names = "pclk";
resets = <&ccu_sys 1>;
reset-names = "prst";
};
...

View File

@@ -1,107 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Baikal-T1 AXI-bus
maintainers:
- Serge Semin <fancer.lancer@gmail.com>
description: |
AXI3-bus is the main communication bus of Baikal-T1 SoC connecting all
high-speed peripheral IP-cores with RAM controller and with MIPS P5600
cores. Traffic arbitration is done by means of DW AXI Interconnect (so
called AXI Main Interconnect) routing IO requests from one block to
another: from CPU to SoC peripherals and between some SoC peripherals
(mostly between peripheral devices and RAM, but also between DMA and
some peripherals). In case of any protocol error, device not responding
an IRQ is raised and a faulty situation is reported to the AXI EHB
(Errors Handler Block) embedded on top of the DW AXI Interconnect and
accessible by means of the Baikal-T1 System Controller.
allOf:
- $ref: /schemas/simple-bus.yaml#
properties:
compatible:
contains:
const: baikal,bt1-axi
reg:
minItems: 1
items:
- description: Synopsys DesignWare AXI Interconnect QoS registers
- description: AXI EHB MMIO system controller registers
reg-names:
minItems: 1
items:
- const: qos
- const: ehb
'#interconnect-cells':
const: 1
syscon:
$ref: /schemas/types.yaml#/definitions/phandle
description: Phandle to the Baikal-T1 System Controller DT node
interrupts:
maxItems: 1
clocks:
items:
- description: Main Interconnect uplink reference clock
clock-names:
items:
- const: aclk
resets:
items:
- description: Main Interconnect reset line
reset-names:
items:
- const: arst
unevaluatedProperties: false
required:
- compatible
- reg
- reg-names
- syscon
- interrupts
- clocks
- clock-names
examples:
- |
#include <dt-bindings/interrupt-controller/mips-gic.h>
bus@1f05a000 {
compatible = "baikal,bt1-axi", "simple-bus";
reg = <0x1f05a000 0x1000>,
<0x1f04d110 0x8>;
reg-names = "qos", "ehb";
#address-cells = <1>;
#size-cells = <1>;
#interconnect-cells = <1>;
syscon = <&syscon>;
ranges;
interrupts = <GIC_SHARED 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu_axi 0>;
clock-names = "aclk";
resets = <&ccu_axi 0>;
reset-names = "arst";
};
...

View File

@@ -39,9 +39,6 @@ properties:
$ref: /schemas/media/video-interfaces.yaml# $ref: /schemas/media/video-interfaces.yaml#
unevaluatedProperties: false unevaluatedProperties: false
properties:
data-lanes: true
required: required:
- data-lanes - data-lanes

View File

@@ -40,8 +40,12 @@ properties:
- auo,g185han01 - auo,g185han01
# AU Optronics Corporation 19.0" (1280x1024) TFT LCD panel # AU Optronics Corporation 19.0" (1280x1024) TFT LCD panel
- auo,g190ean01 - auo,g190ean01
# AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel
- auo,t215hvn01
# BOE AV123Z7M-N17 12.3" (1920x720) LVDS TFT LCD panel # BOE AV123Z7M-N17 12.3" (1920x720) LVDS TFT LCD panel
- boe,av123z7m-n17 - boe,av123z7m-n17
# InnoLux 15.6" FHD (1920x1080) TFT LCD panel
- innolux,g156hce-l01
# Kaohsiung Opto-Electronics Inc. 10.1" WUXGA (1920 x 1200) LVDS TFT LCD panel # Kaohsiung Opto-Electronics Inc. 10.1" WUXGA (1920 x 1200) LVDS TFT LCD panel
- koe,tx26d202vm0bwa - koe,tx26d202vm0bwa
# Lincoln Technology Solutions, LCD185-101CT 10.1" TFT 1920x1200 # Lincoln Technology Solutions, LCD185-101CT 10.1" TFT 1920x1200

View File

@@ -61,8 +61,6 @@ properties:
- auo,p238han01 - auo,p238han01
# AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel # AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel
- auo,p320hvn03 - auo,p320hvn03
# AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel
- auo,t215hvn01
# Shanghai AVIC Optoelectronics 7" 1024x600 color TFT-LCD panel # Shanghai AVIC Optoelectronics 7" 1024x600 color TFT-LCD panel
- avic,tm070ddh03 - avic,tm070ddh03
# BOE AV101HDT-a10 10.1" 1280x720 LVDS panel # BOE AV101HDT-a10 10.1" 1280x720 LVDS panel
@@ -180,8 +178,6 @@ properties:
- innolux,g121xce-l01 - innolux,g121xce-l01
# InnoLux 15.0" G150XGE-L05 XGA (1024x768) TFT LCD panel # InnoLux 15.0" G150XGE-L05 XGA (1024x768) TFT LCD panel
- innolux,g150xge-l05 - innolux,g150xge-l05
# InnoLux 15.6" FHD (1920x1080) TFT LCD panel
- innolux,g156hce-l01
# InnoLux 13.3" FHD (1920x1080) TFT LCD panel # InnoLux 13.3" FHD (1920x1080) TFT LCD panel
- innolux,n133hse-ea1 - innolux,n133hse-ea1
# InnoLux 15.6" WXGA TFT LCD panel # InnoLux 15.6" WXGA TFT LCD panel
@@ -204,6 +200,8 @@ properties:
- lemaker,bl035-rgb-002 - lemaker,bl035-rgb-002
# LG 7" (800x480 pixels) TFT LCD panel # LG 7" (800x480 pixels) TFT LCD panel
- lg,lb070wv8 - lg,lb070wv8
# LG 6.1" (1440x3120) IPS LCD panel
- lg,sw49410
# Logic Technologies LT161010-2NHC 7" WVGA TFT Cap Touch Module # Logic Technologies LT161010-2NHC 7" WVGA TFT Cap Touch Module
- logictechno,lt161010-2nhc - logictechno,lt161010-2nhc
# Logic Technologies LT161010-2NHR 7" WVGA TFT Resistive Touch Module # Logic Technologies LT161010-2NHR 7" WVGA TFT Resistive Touch Module

View File

@@ -36,34 +36,50 @@ properties:
reg: reg:
description: description:
Addresses to each DSS memory region described in the SoC's TRM. Addresses to each DSS memory region described in the SoC's TRM.
items: oneOf:
- description: common DSS register area - items:
- description: VIDL1 light video plane - description: common DSS register area
- description: VID video plane - description: VIDL1 light video plane
- description: OVR1 overlay manager for vp1 - description: VID video plane
- description: OVR2 overlay manager for vp2 - description: OVR1 overlay manager for vp1
- description: VP1 video port 1 - description: OVR2 overlay manager for vp2
- description: VP2 video port 2 - description: VP1 video port 1
- description: common1 DSS register area - description: VP2 video port 2
- description: common1 DSS register area
- items:
- description: common DSS register area
- description: VIDL1 light video plane
- description: OVR1 overlay manager for vp1
- description: VP1 video port 1
- description: common1 DSS register area
reg-names: reg-names:
items: oneOf:
- const: common - items:
- const: vidl1 - const: common
- const: vid - const: vidl1
- const: ovr1 - const: vid
- const: ovr2 - const: ovr1
- const: vp1 - const: ovr2
- const: vp2 - const: vp1
- const: common1 - const: vp2
- const: common1
- items:
- const: common
- const: vidl1
- const: ovr1
- const: vp1
- const: common1
clocks: clocks:
minItems: 2
items: items:
- description: fck DSS functional clock - description: fck DSS functional clock
- description: vp1 Video Port 1 pixel clock - description: vp1 Video Port 1 pixel clock
- description: vp2 Video Port 2 pixel clock - description: vp2 Video Port 2 pixel clock
clock-names: clock-names:
minItems: 2
items: items:
- const: fck - const: fck
- const: vp1 - const: vp1
@@ -179,6 +195,24 @@ allOf:
ports: ports:
properties: properties:
port@1: false port@1: false
reg:
maxItems: 5
reg-names:
maxItems: 5
clocks:
maxItems: 2
clock-names:
maxItems: 2
else:
properties:
reg:
minItems: 8
reg-names:
minItems: 8
clocks:
minItems: 3
clock-names:
minItems: 3
- if: - if:
properties: properties:

View File

@@ -0,0 +1,69 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/input/touchscreen/fsl,imx25-tcq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale mx25 TS conversion queue module
maintainers:
- Frank Li <Frank.Li@nxp.com>
description:
mx25 touchscreen conversion queue module which controls the ADC unit of the
mx25 for attached touchscreens.
properties:
compatible:
const: fsl,imx25-tcq
reg:
maxItems: 1
interrupts:
maxItems: 1
fsl,wires:
description: touch wires number.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [4, 5]
fsl,pen-debounce-ns:
description:
Pen debounce time in nanoseconds.
fsl,pen-threshold:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Pen-down threshold for the touchscreen. This is a value
between 1 and 4096. It is the ratio between the internal reference voltage
and the measured voltage after the plate was precharged. Resistance between
plates and therefore the voltage decreases with pressure so that a smaller
value is equivalent to a higher pressure.
fsl,settling-time-ns:
description:
Settling time in nanoseconds. The settling time is before
the actual touch detection to wait for an even charge distribution in the
plate.
allOf:
- $ref: touchscreen.yaml
required:
- compatible
- reg
- interrupts
- fsl,wires
unevaluatedProperties: false
examples:
- |
touchscreen@50030400 {
compatible = "fsl,imx25-tcq";
reg = <0x50030400 0x60>;
interrupt-parent = <&tscadc>;
interrupts = <0>;
fsl,wires = <4>;
};

View File

@@ -1,34 +0,0 @@
Freescale mx25 TS conversion queue module
mx25 touchscreen conversion queue module which controls the ADC unit of the
mx25 for attached touchscreens.
Required properties:
- compatible: Should be "fsl,imx25-tcq".
- reg: Memory range of the device.
- interrupts: Should be the interrupt number associated with this module within
the tscadc unit (<0>).
- fsl,wires: Should be '<4>' or '<5>'
Optional properties:
- fsl,pen-debounce-ns: Pen debounce time in nanoseconds.
- fsl,pen-threshold: Pen-down threshold for the touchscreen. This is a value
between 1 and 4096. It is the ratio between the internal reference voltage
and the measured voltage after the plate was precharged. Resistance between
plates and therefore the voltage decreases with pressure so that a smaller
value is equivalent to a higher pressure.
- fsl,settling-time-ns: Settling time in nanoseconds. The settling time is before
the actual touch detection to wait for an even charge distribution in the
plate.
This device includes two conversion queues which can be added as subnodes.
The first queue is for the touchscreen, the second for general purpose ADC.
Example:
tsc: tcq@50030400 {
compatible = "fsl,imx25-tcq";
reg = <0x50030400 0x60>;
interrupt-parent = <&tscadc>;
interrupts = <0>;
fsl,wires = <4>;
};

View File

@@ -50,7 +50,7 @@ properties:
The 2nd cell contains the interrupt number for the interrupt type. The 2nd cell contains the interrupt number for the interrupt type.
SPI interrupts are in the range [0-987]. PPI interrupts are in the SPI interrupts are in the range [0-987]. PPI interrupts are in the
range [0-15]. Extended SPI interrupts are in the range [0-1023]. range [0-15]. Extended SPI interrupts are in the range [0-1023].
Extended PPI interrupts are in the range [0-127]. Extended PPI interrupts are in the range [0-63].
The 3rd cell is the flags, encoded as follows: The 3rd cell is the flags, encoded as follows:
bits[3:0] trigger type and level flags. bits[3:0] trigger type and level flags.

View File

@@ -26,7 +26,9 @@ properties:
compatible: compatible:
items: items:
- enum: - enum:
- qcom,eliza-pdc
- qcom,glymur-pdc - qcom,glymur-pdc
- qcom,hawi-pdc
- qcom,kaanapali-pdc - qcom,kaanapali-pdc
- qcom,milos-pdc - qcom,milos-pdc
- qcom,qcs615-pdc - qcom,qcs615-pdc

View File

@@ -63,18 +63,12 @@ description: |
select: select:
anyOf: anyOf:
- properties:
$nodename:
pattern: '^mux-controller'
- required: - required:
- '#mux-control-cells' - '#mux-control-cells'
- required: - required:
- '#mux-state-cells' - '#mux-state-cells'
properties: properties:
$nodename:
pattern: '^mux-controller(@.*|-([0-9]|[1-9][0-9]+))?$'
'#mux-control-cells': '#mux-control-cells':
enum: [ 0, 1 ] enum: [ 0, 1 ]

View File

@@ -172,7 +172,7 @@ examples:
cpu@0 { cpu@0 {
compatible = "arm,cortex-a7"; compatible = "arm,cortex-a7";
device_type = "cpu"; device_type = "cpu";
reg = <0>; reg = <0x0>;
next-level-cache = <&L2>; next-level-cache = <&L2>;
clocks = <&clk_controller 0>; clocks = <&clk_controller 0>;
clock-names = "cpu"; clock-names = "cpu";
@@ -183,7 +183,7 @@ examples:
cpu@1 { cpu@1 {
compatible = "arm,cortex-a7"; compatible = "arm,cortex-a7";
device_type = "cpu"; device_type = "cpu";
reg = <1>; reg = <0x1>;
next-level-cache = <&L2>; next-level-cache = <&L2>;
clocks = <&clk_controller 0>; clocks = <&clk_controller 0>;
clock-names = "cpu"; clock-names = "cpu";
@@ -194,7 +194,7 @@ examples:
cpu@100 { cpu@100 {
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
device_type = "cpu"; device_type = "cpu";
reg = <100>; reg = <0x100>;
next-level-cache = <&L2>; next-level-cache = <&L2>;
clocks = <&clk_controller 1>; clocks = <&clk_controller 1>;
clock-names = "cpu"; clock-names = "cpu";
@@ -205,7 +205,7 @@ examples:
cpu@101 { cpu@101 {
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
device_type = "cpu"; device_type = "cpu";
reg = <101>; reg = <0x101>;
next-level-cache = <&L2>; next-level-cache = <&L2>;
clocks = <&clk_controller 1>; clocks = <&clk_controller 1>;
clock-names = "cpu"; clock-names = "cpu";

View File

@@ -24,7 +24,9 @@ properties:
compatible: compatible:
oneOf: oneOf:
- items: - items:
- const: qcom,sar2130p-spmi-pmic-arb - enum:
- qcom,eliza-spmi-pmic-arb
- qcom,sar2130p-spmi-pmic-arb
- const: qcom,x1e80100-spmi-pmic-arb - const: qcom,x1e80100-spmi-pmic-arb
- const: qcom,x1e80100-spmi-pmic-arb - const: qcom,x1e80100-spmi-pmic-arb

View File

@@ -34,7 +34,9 @@ properties:
- nvidia,tegra186-sysram - nvidia,tegra186-sysram
- nvidia,tegra194-sysram - nvidia,tegra194-sysram
- nvidia,tegra234-sysram - nvidia,tegra234-sysram
- qcom,hawi-imem
- qcom,kaanapali-imem - qcom,kaanapali-imem
- qcom,milos-imem
- qcom,rpm-msg-ram - qcom,rpm-msg-ram
- rockchip,rk3288-pmu-sram - rockchip,rk3288-pmu-sram
@@ -65,7 +67,7 @@ properties:
type: boolean type: boolean
patternProperties: patternProperties:
"^([a-z0-9]*-)?sram(-section)?@[a-f0-9]+$": "^([a-z0-9]+-)*sram(-section)?@[a-f0-9]+$":
type: object type: object
description: description:
Each child of the sram node specifies a region of reserved memory. Each child of the sram node specifies a region of reserved memory.

View File

@@ -129,63 +129,60 @@ patternProperties:
which the thermal framework needs to take action. The actions to which the thermal framework needs to take action. The actions to
be taken are defined in another node called cooling-maps. be taken are defined in another node called cooling-maps.
patternProperties: additionalProperties:
"^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$": type: object
type: object additionalProperties: false
properties: properties:
temperature: temperature:
$ref: /schemas/types.yaml#/definitions/int32 $ref: /schemas/types.yaml#/definitions/int32
minimum: -273000 minimum: -273000
maximum: 200000 maximum: 200000
description: description:
An integer expressing the trip temperature in millicelsius. An integer expressing the trip temperature in millicelsius.
hysteresis: hysteresis:
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
description: description:
An unsigned integer expressing the hysteresis delta with An unsigned integer expressing the hysteresis delta with
respect to the trip temperature property above, also in respect to the trip temperature property above, also in
millicelsius. Any cooling action initiated by the framework is millicelsius. Any cooling action initiated by the framework is
maintained until the temperature falls below maintained until the temperature falls below
(trip temperature - hysteresis). This potentially prevents a (trip temperature - hysteresis). This potentially prevents a
situation where the trip gets constantly triggered soon after situation where the trip gets constantly triggered soon after
cooling action is removed. cooling action is removed.
type: type:
$ref: /schemas/types.yaml#/definitions/string $ref: /schemas/types.yaml#/definitions/string
enum: enum:
- active # enable active cooling e.g. fans - active # enable active cooling e.g. fans
- passive # enable passive cooling e.g. throttling cpu - passive # enable passive cooling e.g. throttling cpu
- hot # send notification to driver - hot # send notification to driver
- critical # send notification to driver, trigger shutdown - critical # send notification to driver, trigger shutdown
description: | description: |
There are four valid trip types: active, passive, hot, There are four valid trip types: active, passive, hot,
critical. critical.
The critical trip type is used to set the maximum The critical trip type is used to set the maximum
temperature threshold above which the HW becomes temperature threshold above which the HW becomes
unstable and underlying firmware might even trigger a unstable and underlying firmware might even trigger a
reboot. Hitting the critical threshold triggers a system reboot. Hitting the critical threshold triggers a system
shutdown. shutdown.
The hot trip type can be used to send a notification to The hot trip type can be used to send a notification to
the thermal driver (if a .notify callback is registered). the thermal driver (if a .notify callback is registered).
The action to be taken is left to the driver. The action to be taken is left to the driver.
The passive trip type can be used to slow down HW e.g. run The passive trip type can be used to slow down HW e.g. run
the CPU, GPU, bus at a lower frequency. the CPU, GPU, bus at a lower frequency.
The active trip type can be used to control other HW to The active trip type can be used to control other HW to
help in cooling e.g. fans can be sped up or slowed down help in cooling e.g. fans can be sped up or slowed down
required: required:
- temperature - temperature
- hysteresis - hysteresis
- type - type
additionalProperties: false
additionalProperties: false
cooling-maps: cooling-maps:
type: object type: object

View File

@@ -48,30 +48,30 @@ from 'scripts/dtc/of_unittest_expect --help'.
3. Test-data 3. Test-data
============ ============
The Device Tree Source file (drivers/of/unittest-data/testcases.dts) contains The Device Tree Source file (drivers/of/unittest-data/testcases.dtso) contains
the test data required for executing the unit tests automated in the test data required for executing the unit tests automated in
drivers/of/unittest.c. See the content of the folder:: drivers/of/unittest.c. See the content of the folder::
drivers/of/unittest-data/tests-*.dtsi drivers/of/unittest-data/tests-*.dtsi
for the Device Tree Source Include files (.dtsi) included in testcases.dts. for the Device Tree Source Include files (.dtsi) included in testcases.dtso.
When the kernel is built with CONFIG_OF_UNITTEST enabled, then the following make When the kernel is built with CONFIG_OF_UNITTEST enabled, then the following make
rule:: rule::
$(obj)/%.dtb: $(src)/%.dts FORCE $(obj)/%.dtbo: $(src)/%.dtso $(DTC) FORCE
$(call if_changed_dep, dtc) $(call if_changed_dep,dtc)
is used to compile the DT source file (testcases.dts) into a binary blob is used to compile the DT source file (testcases.dtso) into a binary blob
(testcases.dtb), also referred as flattened DT. (testcases.dtbo), also referred as flattened DT.
After that, using the following rule the binary blob above is wrapped as an After that, using the following rule the binary blob above is wrapped as an
assembly file (testcases.dtb.S):: assembly file (testcases.dtbo.S)::
$(obj)/%.dtb.S: $(obj)/%.dtb $(obj)/%.dtbo.S: $(obj)/%.dtbo FORCE
$(call cmd, dt_S_dtb) $(call if_changed,wrap_S_dtb)
The assembly file is compiled into an object file (testcases.dtb.o), and is The assembly file is compiled into an object file (testcases.dtbo.o), and is
linked into the kernel image. linked into the kernel image.

View File

@@ -32,27 +32,30 @@ OF Selftest被设计用来测试提供给设备驱动开发者的接口includ
2. 测试数据 2. 测试数据
=========== ===========
设备树源文件drivers/of/unittest-data/testcases.dts包含执行drivers/of/unittest.c 设备树源文件drivers/of/unittest-data/testcases.dtso包含执行drivers/of/unittest.c
中自动化单元测试所需的测试数据。目前,以下设备树源包含文件(.dtsi被包含在testcases.dt中:: 中自动化单元测试所需的测试数据。目前,以下设备树源包含文件(.dtsi被包含在testcases.dtso::
drivers/of/unittest-data/tests-interrupts.dtsi drivers/of/unittest-data/tests-interrupts.dtsi
drivers/of/unittest-data/tests-platform.dtsi drivers/of/unittest-data/tests-platform.dtsi
drivers/of/unittest-data/tests-phandle.dtsi drivers/of/unittest-data/tests-phandle.dtsi
drivers/of/unittest-data/tests-match.dtsi drivers/of/unittest-data/tests-match.dtsi
drivers/of/unittest-data/tests-address.dtsi
drivers/of/unittest-data/tests-overlay.dtsi
drivers/of/unittest-data/tests-lifecycle.dtsi
当内核在启用CONFIG_OF_UNITTEST的情况下被构建时那么下面的make规则:: 当内核在启用CONFIG_OF_UNITTEST的情况下被构建时那么下面的make规则::
$(obj)/%.dtb: $(src)/%.dts FORCE $(obj)/%.dtbo: $(src)/%.dtso $(DTC) FORCE
$(call if_changed_dep, dtc) $(call if_changed_dep,dtc)
用于将DT源文件testcases.dts编译成二进制blobtestcases.dtb也被称为扁平化的DT。 用于将DT源文件testcases.dtso编译成二进制blobtestcases.dtbo也被称为扁平化的DT。
之后使用以下规则将上述二进制blob包装成一个汇编文件testcases.dtb.S:: 之后使用以下规则将上述二进制blob包装成一个汇编文件testcases.dtbo.S::
$(obj)/%.dtb.S: $(obj)/%.dtb $(obj)/%.dtbo.S: $(obj)/%.dtbo FORCE
$(call cmd, dt_S_dtb) $(call if_changed,wrap_S_dtb)
汇编文件被编译成一个对象文件testcases.dtb.o并被链接到内核镜像中。 汇编文件被编译成一个对象文件testcases.dtbo.o并被链接到内核镜像中。
2.1. 添加测试数据 2.1. 添加测试数据

View File

@@ -38,36 +38,6 @@ config BRCMSTB_GISB_ARB
arbiter. This driver provides timeout and target abort error handling arbiter. This driver provides timeout and target abort error handling
and internal bus master decoding. and internal bus master decoding.
config BT1_APB
bool "Baikal-T1 APB-bus driver"
depends on MIPS_BAIKAL_T1 || COMPILE_TEST
select REGMAP_MMIO
help
Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
IO requests are routed to this bus by means of the DW AMBA 3 AXI
Interconnect. In case of any APB protocol collisions, slave device
not responding on timeout an IRQ is raised with an erroneous address
reported to the APB terminator (APB Errors Handler Block). This
driver provides the interrupt handler to detect the erroneous
address, prints an error message about the address fault, updates an
errors counter. The counter and the APB-bus operations timeout can be
accessed via corresponding sysfs nodes.
config BT1_AXI
bool "Baikal-T1 AXI-bus driver"
depends on MIPS_BAIKAL_T1 || COMPILE_TEST
select MFD_SYSCON
help
AXI3-bus is the main communication bus connecting all high-speed
peripheral IP-cores with RAM controller and with MIPS P5600 cores on
Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
Interconnect (so called AXI Main Interconnect) routing IO requests
from one SoC block to another. This driver provides a way to detect
any bus protocol errors and device not responding situations by
means of an embedded on top of the interconnect errors handler
block (EHB). AXI Interconnect QoS arbitration tuning is currently
unsupported.
config MOXTET config MOXTET
tristate "CZ.NIC Turris Mox module configuration bus" tristate "CZ.NIC Turris Mox module configuration bus"
depends on SPI_MASTER && OF depends on SPI_MASTER && OF

View File

@@ -13,8 +13,6 @@ obj-$(CONFIG_MOXTET) += moxtet.o
# DPAA2 fsl-mc bus # DPAA2 fsl-mc bus
obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/ obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
obj-$(CONFIG_BT1_APB) += bt1-apb.o
obj-$(CONFIG_BT1_AXI) += bt1-axi.o
obj-$(CONFIG_IMX_AIPSTZ) += imx-aipstz.o obj-$(CONFIG_IMX_AIPSTZ) += imx-aipstz.o
obj-$(CONFIG_IMX_WEIM) += imx-weim.o obj-$(CONFIG_IMX_WEIM) += imx-weim.o
obj-$(CONFIG_INTEL_IXP4XX_EB) += intel-ixp4xx-eb.o obj-$(CONFIG_INTEL_IXP4XX_EB) += intel-ixp4xx-eb.o

View File

@@ -1,396 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
*
* Authors:
* Serge Semin <Sergey.Semin@baikalelectronics.ru>
*
* Baikal-T1 APB-bus driver
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/device.h>
#include <linux/atomic.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/nmi.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include <linux/clk.h>
#include <linux/reset.h>
#include <linux/time64.h>
#include <linux/sysfs.h>
#define APB_EHB_ISR 0x00
#define APB_EHB_ISR_PENDING BIT(0)
#define APB_EHB_ISR_MASK BIT(1)
#define APB_EHB_ADDR 0x04
#define APB_EHB_TIMEOUT 0x08
#define APB_EHB_TIMEOUT_MIN 0x000003FFU
#define APB_EHB_TIMEOUT_MAX 0xFFFFFFFFU
/*
* struct bt1_apb - Baikal-T1 APB EHB private data
* @dev: Pointer to the device structure.
* @regs: APB EHB registers map.
* @res: No-device error injection memory region.
* @irq: Errors IRQ number.
* @rate: APB-bus reference clock rate.
* @pclk: APB-reference clock.
* @prst: APB domain reset line.
* @count: Number of errors detected.
*/
struct bt1_apb {
struct device *dev;
struct regmap *regs;
void __iomem *res;
int irq;
unsigned long rate;
struct clk *pclk;
struct reset_control *prst;
atomic_t count;
};
static const struct regmap_config bt1_apb_regmap_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.max_register = APB_EHB_TIMEOUT,
.fast_io = true
};
static inline unsigned long bt1_apb_n_to_timeout_us(struct bt1_apb *apb, u32 n)
{
u64 timeout = (u64)n * USEC_PER_SEC;
do_div(timeout, apb->rate);
return timeout;
}
static inline unsigned long bt1_apb_timeout_to_n_us(struct bt1_apb *apb,
unsigned long timeout)
{
u64 n = (u64)timeout * apb->rate;
do_div(n, USEC_PER_SEC);
return n;
}
static irqreturn_t bt1_apb_isr(int irq, void *data)
{
struct bt1_apb *apb = data;
u32 addr = 0;
regmap_read(apb->regs, APB_EHB_ADDR, &addr);
dev_crit_ratelimited(apb->dev,
"APB-bus fault %d: Slave access timeout at 0x%08x\n",
atomic_inc_return(&apb->count),
addr);
/*
* Print backtrace on each CPU. This might be pointless if the fault
* has happened on the same CPU as the IRQ handler is executed or
* the other core proceeded further execution despite the error.
* But if it's not, by looking at the trace we would get straight to
* the cause of the problem.
*/
trigger_all_cpu_backtrace();
regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_PENDING, 0);
return IRQ_HANDLED;
}
static void bt1_apb_clear_data(void *data)
{
struct bt1_apb *apb = data;
struct platform_device *pdev = to_platform_device(apb->dev);
platform_set_drvdata(pdev, NULL);
}
static struct bt1_apb *bt1_apb_create_data(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct bt1_apb *apb;
int ret;
apb = devm_kzalloc(dev, sizeof(*apb), GFP_KERNEL);
if (!apb)
return ERR_PTR(-ENOMEM);
ret = devm_add_action(dev, bt1_apb_clear_data, apb);
if (ret) {
dev_err(dev, "Can't add APB EHB data clear action\n");
return ERR_PTR(ret);
}
apb->dev = dev;
atomic_set(&apb->count, 0);
platform_set_drvdata(pdev, apb);
return apb;
}
static int bt1_apb_request_regs(struct bt1_apb *apb)
{
struct platform_device *pdev = to_platform_device(apb->dev);
void __iomem *regs;
regs = devm_platform_ioremap_resource_byname(pdev, "ehb");
if (IS_ERR(regs)) {
dev_err(apb->dev, "Couldn't map APB EHB registers\n");
return PTR_ERR(regs);
}
apb->regs = devm_regmap_init_mmio(apb->dev, regs, &bt1_apb_regmap_cfg);
if (IS_ERR(apb->regs)) {
dev_err(apb->dev, "Couldn't create APB EHB regmap\n");
return PTR_ERR(apb->regs);
}
apb->res = devm_platform_ioremap_resource_byname(pdev, "nodev");
if (IS_ERR(apb->res))
dev_err(apb->dev, "Couldn't map reserved region\n");
return PTR_ERR_OR_ZERO(apb->res);
}
static int bt1_apb_request_rst(struct bt1_apb *apb)
{
int ret;
apb->prst = devm_reset_control_get_optional_exclusive(apb->dev, "prst");
if (IS_ERR(apb->prst))
return dev_err_probe(apb->dev, PTR_ERR(apb->prst),
"Couldn't get reset control line\n");
ret = reset_control_deassert(apb->prst);
if (ret)
dev_err(apb->dev, "Failed to deassert the reset line\n");
return ret;
}
static int bt1_apb_request_clk(struct bt1_apb *apb)
{
apb->pclk = devm_clk_get_enabled(apb->dev, "pclk");
if (IS_ERR(apb->pclk))
return dev_err_probe(apb->dev, PTR_ERR(apb->pclk),
"Couldn't get APB clock descriptor\n");
apb->rate = clk_get_rate(apb->pclk);
if (!apb->rate) {
dev_err(apb->dev, "Invalid clock rate\n");
return -EINVAL;
}
return 0;
}
static void bt1_apb_clear_irq(void *data)
{
struct bt1_apb *apb = data;
regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_MASK, 0);
}
static int bt1_apb_request_irq(struct bt1_apb *apb)
{
struct platform_device *pdev = to_platform_device(apb->dev);
int ret;
apb->irq = platform_get_irq(pdev, 0);
if (apb->irq < 0)
return apb->irq;
ret = devm_request_irq(apb->dev, apb->irq, bt1_apb_isr, IRQF_SHARED,
"bt1-apb", apb);
if (ret) {
dev_err(apb->dev, "Couldn't request APB EHB IRQ\n");
return ret;
}
ret = devm_add_action(apb->dev, bt1_apb_clear_irq, apb);
if (ret) {
dev_err(apb->dev, "Can't add APB EHB IRQs clear action\n");
return ret;
}
/* Unmask IRQ and clear it' pending flag. */
regmap_update_bits(apb->regs, APB_EHB_ISR,
APB_EHB_ISR_PENDING | APB_EHB_ISR_MASK,
APB_EHB_ISR_MASK);
return 0;
}
static ssize_t count_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct bt1_apb *apb = dev_get_drvdata(dev);
return scnprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&apb->count));
}
static DEVICE_ATTR_RO(count);
static ssize_t timeout_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct bt1_apb *apb = dev_get_drvdata(dev);
unsigned long timeout;
int ret;
u32 n;
ret = regmap_read(apb->regs, APB_EHB_TIMEOUT, &n);
if (ret)
return ret;
timeout = bt1_apb_n_to_timeout_us(apb, n);
return scnprintf(buf, PAGE_SIZE, "%lu\n", timeout);
}
static ssize_t timeout_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct bt1_apb *apb = dev_get_drvdata(dev);
unsigned long timeout;
int ret;
u32 n;
if (kstrtoul(buf, 0, &timeout) < 0)
return -EINVAL;
n = bt1_apb_timeout_to_n_us(apb, timeout);
n = clamp(n, APB_EHB_TIMEOUT_MIN, APB_EHB_TIMEOUT_MAX);
ret = regmap_write(apb->regs, APB_EHB_TIMEOUT, n);
return ret ?: count;
}
static DEVICE_ATTR_RW(timeout);
static ssize_t inject_error_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
return scnprintf(buf, PAGE_SIZE, "Error injection: nodev irq\n");
}
static ssize_t inject_error_store(struct device *dev,
struct device_attribute *attr,
const char *data, size_t count)
{
struct bt1_apb *apb = dev_get_drvdata(dev);
/*
* Either dummy read from the unmapped address in the APB IO area
* or manually set the IRQ status.
*/
if (sysfs_streq(data, "nodev"))
readl(apb->res);
else if (sysfs_streq(data, "irq"))
regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_PENDING,
APB_EHB_ISR_PENDING);
else
return -EINVAL;
return count;
}
static DEVICE_ATTR_RW(inject_error);
static struct attribute *bt1_apb_sysfs_attrs[] = {
&dev_attr_count.attr,
&dev_attr_timeout.attr,
&dev_attr_inject_error.attr,
NULL
};
ATTRIBUTE_GROUPS(bt1_apb_sysfs);
static void bt1_apb_remove_sysfs(void *data)
{
struct bt1_apb *apb = data;
device_remove_groups(apb->dev, bt1_apb_sysfs_groups);
}
static int bt1_apb_init_sysfs(struct bt1_apb *apb)
{
int ret;
ret = device_add_groups(apb->dev, bt1_apb_sysfs_groups);
if (ret) {
dev_err(apb->dev, "Failed to create EHB APB sysfs nodes\n");
return ret;
}
ret = devm_add_action_or_reset(apb->dev, bt1_apb_remove_sysfs, apb);
if (ret)
dev_err(apb->dev, "Can't add APB EHB sysfs remove action\n");
return ret;
}
static int bt1_apb_probe(struct platform_device *pdev)
{
struct bt1_apb *apb;
int ret;
apb = bt1_apb_create_data(pdev);
if (IS_ERR(apb))
return PTR_ERR(apb);
ret = bt1_apb_request_regs(apb);
if (ret)
return ret;
ret = bt1_apb_request_rst(apb);
if (ret)
return ret;
ret = bt1_apb_request_clk(apb);
if (ret)
return ret;
ret = bt1_apb_request_irq(apb);
if (ret)
return ret;
ret = bt1_apb_init_sysfs(apb);
if (ret)
return ret;
return 0;
}
static const struct of_device_id bt1_apb_of_match[] = {
{ .compatible = "baikal,bt1-apb" },
{ }
};
MODULE_DEVICE_TABLE(of, bt1_apb_of_match);
static struct platform_driver bt1_apb_driver = {
.probe = bt1_apb_probe,
.driver = {
.name = "bt1-apb",
.of_match_table = bt1_apb_of_match
}
};
module_platform_driver(bt1_apb_driver);
MODULE_AUTHOR("Serge Semin <Sergey.Semin@baikalelectronics.ru>");
MODULE_DESCRIPTION("Baikal-T1 APB-bus driver");

View File

@@ -1,292 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
*
* Authors:
* Serge Semin <Sergey.Semin@baikalelectronics.ru>
*
* Baikal-T1 AXI-bus driver
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/bitfield.h>
#include <linux/device.h>
#include <linux/atomic.h>
#include <linux/regmap.h>
#include <linux/platform_device.h>
#include <linux/mfd/syscon.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/nmi.h>
#include <linux/of.h>
#include <linux/clk.h>
#include <linux/reset.h>
#include <linux/sysfs.h>
#define BT1_AXI_WERRL 0x110
#define BT1_AXI_WERRH 0x114
#define BT1_AXI_WERRH_TYPE BIT(23)
#define BT1_AXI_WERRH_ADDR_FLD 24
#define BT1_AXI_WERRH_ADDR_MASK GENMASK(31, BT1_AXI_WERRH_ADDR_FLD)
/*
* struct bt1_axi - Baikal-T1 AXI-bus private data
* @dev: Pointer to the device structure.
* @qos_regs: AXI Interconnect QoS tuning registers.
* @sys_regs: Baikal-T1 System Controller registers map.
* @irq: Errors IRQ number.
* @aclk: AXI reference clock.
* @arst: AXI Interconnect reset line.
* @count: Number of errors detected.
*/
struct bt1_axi {
struct device *dev;
void __iomem *qos_regs;
struct regmap *sys_regs;
int irq;
struct clk *aclk;
struct reset_control *arst;
atomic_t count;
};
static irqreturn_t bt1_axi_isr(int irq, void *data)
{
struct bt1_axi *axi = data;
u32 low = 0, high = 0;
regmap_read(axi->sys_regs, BT1_AXI_WERRL, &low);
regmap_read(axi->sys_regs, BT1_AXI_WERRH, &high);
dev_crit_ratelimited(axi->dev,
"AXI-bus fault %d: %s at 0x%x%08x\n",
atomic_inc_return(&axi->count),
high & BT1_AXI_WERRH_TYPE ? "no slave" : "slave protocol error",
high, low);
/*
* Print backtrace on each CPU. This might be pointless if the fault
* has happened on the same CPU as the IRQ handler is executed or
* the other core proceeded further execution despite the error.
* But if it's not, by looking at the trace we would get straight to
* the cause of the problem.
*/
trigger_all_cpu_backtrace();
return IRQ_HANDLED;
}
static void bt1_axi_clear_data(void *data)
{
struct bt1_axi *axi = data;
struct platform_device *pdev = to_platform_device(axi->dev);
platform_set_drvdata(pdev, NULL);
}
static struct bt1_axi *bt1_axi_create_data(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct bt1_axi *axi;
int ret;
axi = devm_kzalloc(dev, sizeof(*axi), GFP_KERNEL);
if (!axi)
return ERR_PTR(-ENOMEM);
ret = devm_add_action(dev, bt1_axi_clear_data, axi);
if (ret) {
dev_err(dev, "Can't add AXI EHB data clear action\n");
return ERR_PTR(ret);
}
axi->dev = dev;
atomic_set(&axi->count, 0);
platform_set_drvdata(pdev, axi);
return axi;
}
static int bt1_axi_request_regs(struct bt1_axi *axi)
{
struct platform_device *pdev = to_platform_device(axi->dev);
struct device *dev = axi->dev;
axi->sys_regs = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon");
if (IS_ERR(axi->sys_regs)) {
dev_err(dev, "Couldn't find syscon registers\n");
return PTR_ERR(axi->sys_regs);
}
axi->qos_regs = devm_platform_ioremap_resource_byname(pdev, "qos");
if (IS_ERR(axi->qos_regs))
dev_err(dev, "Couldn't map AXI-bus QoS registers\n");
return PTR_ERR_OR_ZERO(axi->qos_regs);
}
static int bt1_axi_request_rst(struct bt1_axi *axi)
{
int ret;
axi->arst = devm_reset_control_get_optional_exclusive(axi->dev, "arst");
if (IS_ERR(axi->arst))
return dev_err_probe(axi->dev, PTR_ERR(axi->arst),
"Couldn't get reset control line\n");
ret = reset_control_deassert(axi->arst);
if (ret)
dev_err(axi->dev, "Failed to deassert the reset line\n");
return ret;
}
static int bt1_axi_request_clk(struct bt1_axi *axi)
{
axi->aclk = devm_clk_get_enabled(axi->dev, "aclk");
if (IS_ERR(axi->aclk))
return dev_err_probe(axi->dev, PTR_ERR(axi->aclk),
"Couldn't get AXI Interconnect clock\n");
return 0;
}
static int bt1_axi_request_irq(struct bt1_axi *axi)
{
struct platform_device *pdev = to_platform_device(axi->dev);
int ret;
axi->irq = platform_get_irq(pdev, 0);
if (axi->irq < 0)
return axi->irq;
ret = devm_request_irq(axi->dev, axi->irq, bt1_axi_isr, IRQF_SHARED,
"bt1-axi", axi);
if (ret)
dev_err(axi->dev, "Couldn't request AXI EHB IRQ\n");
return ret;
}
static ssize_t count_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct bt1_axi *axi = dev_get_drvdata(dev);
return scnprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&axi->count));
}
static DEVICE_ATTR_RO(count);
static ssize_t inject_error_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
return scnprintf(buf, PAGE_SIZE, "Error injection: bus unaligned\n");
}
static ssize_t inject_error_store(struct device *dev,
struct device_attribute *attr,
const char *data, size_t count)
{
struct bt1_axi *axi = dev_get_drvdata(dev);
/*
* Performing unaligned read from the memory will cause the CM2 bus
* error while unaligned writing - the AXI bus write error handled
* by this driver.
*/
if (sysfs_streq(data, "bus"))
readb(axi->qos_regs);
else if (sysfs_streq(data, "unaligned"))
writeb(0, axi->qos_regs);
else
return -EINVAL;
return count;
}
static DEVICE_ATTR_RW(inject_error);
static struct attribute *bt1_axi_sysfs_attrs[] = {
&dev_attr_count.attr,
&dev_attr_inject_error.attr,
NULL
};
ATTRIBUTE_GROUPS(bt1_axi_sysfs);
static void bt1_axi_remove_sysfs(void *data)
{
struct bt1_axi *axi = data;
device_remove_groups(axi->dev, bt1_axi_sysfs_groups);
}
static int bt1_axi_init_sysfs(struct bt1_axi *axi)
{
int ret;
ret = device_add_groups(axi->dev, bt1_axi_sysfs_groups);
if (ret) {
dev_err(axi->dev, "Failed to add sysfs files group\n");
return ret;
}
ret = devm_add_action_or_reset(axi->dev, bt1_axi_remove_sysfs, axi);
if (ret)
dev_err(axi->dev, "Can't add AXI EHB sysfs remove action\n");
return ret;
}
static int bt1_axi_probe(struct platform_device *pdev)
{
struct bt1_axi *axi;
int ret;
axi = bt1_axi_create_data(pdev);
if (IS_ERR(axi))
return PTR_ERR(axi);
ret = bt1_axi_request_regs(axi);
if (ret)
return ret;
ret = bt1_axi_request_rst(axi);
if (ret)
return ret;
ret = bt1_axi_request_clk(axi);
if (ret)
return ret;
ret = bt1_axi_request_irq(axi);
if (ret)
return ret;
ret = bt1_axi_init_sysfs(axi);
if (ret)
return ret;
return 0;
}
static const struct of_device_id bt1_axi_of_match[] = {
{ .compatible = "baikal,bt1-axi" },
{ }
};
MODULE_DEVICE_TABLE(of, bt1_axi_of_match);
static struct platform_driver bt1_axi_driver = {
.probe = bt1_axi_probe,
.driver = {
.name = "bt1-axi",
.of_match_table = bt1_axi_of_match
}
};
module_platform_driver(bt1_axi_driver);
MODULE_AUTHOR("Serge Semin <Sergey.Semin@baikalelectronics.ru>");
MODULE_DESCRIPTION("Baikal-T1 AXI-bus driver");

View File

@@ -115,15 +115,10 @@ MODULE_DEVICE_TABLE(of, airoha_cpufreq_match_list);
static int __init airoha_cpufreq_init(void) static int __init airoha_cpufreq_init(void)
{ {
struct device_node *np = of_find_node_by_path("/");
const struct of_device_id *match; const struct of_device_id *match;
int ret; int ret;
if (!np) match = of_machine_get_match(airoha_cpufreq_match_list);
return -ENODEV;
match = of_match_node(airoha_cpufreq_match_list, np);
of_node_put(np);
if (!match) if (!match)
return -ENODEV; return -ENODEV;

View File

@@ -291,17 +291,9 @@ static int qcom_cpufreq_ipq8064_name_version(struct device *cpu_dev,
ret = qcom_smem_get_soc_id(&msm_id); ret = qcom_smem_get_soc_id(&msm_id);
if (ret == -ENODEV) { if (ret == -ENODEV) {
const struct of_device_id *match; const struct of_device_id *match;
struct device_node *root;
root = of_find_node_by_path("/");
if (!root) {
ret = -ENODEV;
goto exit;
}
/* Fallback to compatible match with no SMEM initialized */ /* Fallback to compatible match with no SMEM initialized */
match = of_match_node(qcom_cpufreq_ipq806x_match_list, root); match = of_machine_get_match(qcom_cpufreq_ipq806x_match_list);
of_node_put(root);
if (!match) { if (!match) {
ret = -ENODEV; ret = -ENODEV;
goto exit; goto exit;
@@ -647,14 +639,10 @@ MODULE_DEVICE_TABLE(of, qcom_cpufreq_match_list);
*/ */
static int __init qcom_cpufreq_init(void) static int __init qcom_cpufreq_init(void)
{ {
struct device_node *np __free(device_node) = of_find_node_by_path("/");
const struct of_device_id *match; const struct of_device_id *match;
int ret; int ret;
if (!np) match = of_machine_get_match(qcom_cpufreq_match_list);
return -ENODEV;
match = of_match_node(qcom_cpufreq_match_list, np);
if (!match) if (!match)
return -ENODEV; return -ENODEV;

View File

@@ -502,16 +502,6 @@ static const struct of_device_id ti_cpufreq_of_match[] __maybe_unused = {
{}, {},
}; };
static const struct of_device_id *ti_cpufreq_match_node(void)
{
struct device_node *np __free(device_node) = of_find_node_by_path("/");
const struct of_device_id *match;
match = of_match_node(ti_cpufreq_of_match, np);
return match;
}
static int ti_cpufreq_probe(struct platform_device *pdev) static int ti_cpufreq_probe(struct platform_device *pdev)
{ {
u32 version[VERSION_COUNT]; u32 version[VERSION_COUNT];
@@ -596,7 +586,7 @@ static int __init ti_cpufreq_init(void)
const struct of_device_id *match; const struct of_device_id *match;
/* Check to ensure we are on a compatible platform */ /* Check to ensure we are on a compatible platform */
match = ti_cpufreq_match_node(); match = of_machine_get_match(ti_cpufreq_of_match);
if (match) if (match)
platform_device_register_data(NULL, "ti-cpufreq", -1, match, platform_device_register_data(NULL, "ti-cpufreq", -1, match,
sizeof(*match)); sizeof(*match));

View File

@@ -463,13 +463,12 @@ int of_machine_read_model(const char **model)
EXPORT_SYMBOL_GPL(of_machine_read_model); EXPORT_SYMBOL_GPL(of_machine_read_model);
/** /**
* of_machine_device_match - Test root of device tree against a of_device_id array * of_machine_get_match - Test root of device tree against an of_device_id array
* @matches: NULL terminated array of of_device_id match structures to search in * @matches: NULL terminated array of of_device_id match structures to search in
* *
* Returns true if the root node has any of the given compatible values in its * Returns matched entry or NULL
* compatible property.
*/ */
bool of_machine_device_match(const struct of_device_id *matches) const struct of_device_id *of_machine_get_match(const struct of_device_id *matches)
{ {
struct device_node *root; struct device_node *root;
const struct of_device_id *match = NULL; const struct of_device_id *match = NULL;
@@ -480,9 +479,9 @@ bool of_machine_device_match(const struct of_device_id *matches)
of_node_put(root); of_node_put(root);
} }
return match != NULL; return match;
} }
EXPORT_SYMBOL(of_machine_device_match); EXPORT_SYMBOL(of_machine_get_match);
/** /**
* of_machine_get_match_data - Tell if root of device tree has a matching of_match structure * of_machine_get_match_data - Tell if root of device tree has a matching of_match structure
@@ -493,15 +492,8 @@ EXPORT_SYMBOL(of_machine_device_match);
const void *of_machine_get_match_data(const struct of_device_id *matches) const void *of_machine_get_match_data(const struct of_device_id *matches)
{ {
const struct of_device_id *match; const struct of_device_id *match;
struct device_node *root;
root = of_find_node_by_path("/");
if (!root)
return NULL;
match = of_match_node(matches, root);
of_node_put(root);
match = of_machine_get_match(matches);
if (!match) if (!match)
return NULL; return NULL;

View File

@@ -68,7 +68,7 @@ void __init of_fdt_limit_memory(int limit)
bool of_fdt_device_is_available(const void *blob, unsigned long node) bool of_fdt_device_is_available(const void *blob, unsigned long node)
{ {
const char *status = fdt_getprop(blob, node, "status", NULL); const char *status = fdt_stringlist_get(blob, node, "status", 0, NULL);
if (!status) if (!status)
return true; return true;
@@ -677,22 +677,15 @@ void __init of_flat_dt_read_addr_size(const __be32 *prop, int entry_index,
* specific compatible values. * specific compatible values.
*/ */
static int of_fdt_is_compatible(const void *blob, static int of_fdt_is_compatible(const void *blob,
unsigned long node, const char *compat) unsigned long node, const char *compat)
{ {
const char *cp; const char *cp;
int cplen; int idx = 0, score = 0;
unsigned long l, score = 0;
cp = fdt_getprop(blob, node, "compatible", &cplen); while ((cp = fdt_stringlist_get(blob, node, "compatible", idx++, NULL))) {
if (cp == NULL)
return 0;
while (cplen > 0) {
score++; score++;
if (of_compat_cmp(cp, compat, strlen(compat)) == 0) if (of_compat_cmp(cp, compat, strlen(compat)) == 0)
return score; return score;
l = strlen(cp) + 1;
cp += l;
cplen -= l;
} }
return 0; return 0;
@@ -741,9 +734,10 @@ const char * __init of_flat_dt_get_machine_name(void)
const char *name; const char *name;
unsigned long dt_root = of_get_flat_dt_root(); unsigned long dt_root = of_get_flat_dt_root();
name = of_get_flat_dt_prop(dt_root, "model", NULL); name = fdt_stringlist_get(initial_boot_params, dt_root, "model", 0, NULL);
if (!name) if (!name)
name = of_get_flat_dt_prop(dt_root, "compatible", NULL); name = fdt_stringlist_get(initial_boot_params, dt_root,
"compatible", 0, NULL);
return name; return name;
} }
@@ -775,19 +769,14 @@ const void * __init of_flat_dt_match_machine(const void *default_match,
} }
if (!best_data) { if (!best_data) {
const char *prop; const char *prop;
int size; int idx = 0, size;
pr_err("\n unrecognized device tree list:\n[ "); pr_err("\n unrecognized device tree list:\n[ ");
prop = of_get_flat_dt_prop(dt_root, "compatible", &size); while ((prop = fdt_stringlist_get(initial_boot_params, dt_root,
if (prop) { "compatible", idx++, &size)))
while (size > 0) { pr_err("'%s' ", prop);
printk("'%s' ", prop); pr_err("]\n\n");
size -= strlen(prop) + 1;
prop += strlen(prop) + 1;
}
}
printk("]\n\n");
return NULL; return NULL;
} }
@@ -974,9 +963,9 @@ int __init early_init_dt_scan_chosen_stdout(void)
if (offset < 0) if (offset < 0)
return -ENOENT; return -ENOENT;
p = fdt_getprop(fdt, offset, "stdout-path", &l); p = fdt_stringlist_get(fdt, offset, "stdout-path", 0, &l);
if (!p) if (!p)
p = fdt_getprop(fdt, offset, "linux,stdout-path", &l); p = fdt_stringlist_get(fdt, offset, "linux,stdout-path", 0, &l);
if (!p || !l) if (!p || !l)
return -ENOENT; return -ENOENT;
@@ -1052,7 +1041,8 @@ int __init early_init_dt_scan_memory(void)
const void *fdt = initial_boot_params; const void *fdt = initial_boot_params;
fdt_for_each_subnode(node, fdt, 0) { fdt_for_each_subnode(node, fdt, 0) {
const char *type = of_get_flat_dt_prop(node, "device_type", NULL); const char *type = fdt_stringlist_get(fdt, node,
"device_type", 0, NULL);
const __be32 *reg; const __be32 *reg;
int i, l; int i, l;
bool hotpluggable; bool hotpluggable;

View File

@@ -500,7 +500,7 @@ static const struct of_device_id reserved_mem_matches[] = {
static int __init of_platform_default_populate_init(void) static int __init of_platform_default_populate_init(void)
{ {
struct device_node *node; struct device_node *node, *reserved;
device_links_supplier_sync_state_pause(); device_links_supplier_sync_state_pause();
@@ -563,8 +563,14 @@ static int __init of_platform_default_populate_init(void)
* platform_devices for every node in /reserved-memory with a * platform_devices for every node in /reserved-memory with a
* "compatible", * "compatible",
*/ */
for_each_matching_node(node, reserved_mem_matches) reserved = of_find_node_by_path("/reserved-memory");
of_platform_device_create(node, NULL, NULL); if (reserved) {
for_each_child_of_node(reserved, node) {
if (of_match_node(reserved_mem_matches, node))
of_platform_device_create(node, NULL, NULL);
}
of_node_put(reserved);
}
node = of_find_node_by_path("/firmware"); node = of_find_node_by_path("/firmware");
if (node) { if (node) {

View File

@@ -88,7 +88,7 @@ EXPORT_SYMBOL(of_graph_is_present);
* Search for a property in a device node and count the number of elements of * Search for a property in a device node and count the number of elements of
* size elem_size in it. * size elem_size in it.
* *
* Return: The number of elements on sucess, -EINVAL if the property does not * Return: The number of elements on success, -EINVAL if the property does not
* exist or its length does not match a multiple of elem_size and -ENODATA if * exist or its length does not match a multiple of elem_size and -ENODATA if
* the property does not have a value. * the property does not have a value.
*/ */
@@ -1620,12 +1620,36 @@ static int of_fwnode_irq_get(const struct fwnode_handle *fwnode,
return of_irq_get(to_of_node(fwnode), index); return of_irq_get(to_of_node(fwnode), index);
} }
static int match_property_by_path(const char *node_path, const char *prop_name,
const char *value)
{
struct device_node *np __free(device_node) = of_find_node_by_path(node_path);
return of_property_match_string(np, prop_name, value);
}
static bool of_is_fwnode_add_links_supported(void)
{
static int is_supported = -1;
if (!IS_ENABLED(CONFIG_X86))
return true;
if (is_supported != -1)
return !!is_supported;
is_supported = !((match_property_by_path("/soc", "compatible", "intel,ce4100-cp") >= 0) ||
(match_property_by_path("/", "architecture", "OLPC") >= 0));
return !!is_supported;
}
static int of_fwnode_add_links(struct fwnode_handle *fwnode) static int of_fwnode_add_links(struct fwnode_handle *fwnode)
{ {
const struct property *p; const struct property *p;
struct device_node *con_np = to_of_node(fwnode); struct device_node *con_np = to_of_node(fwnode);
if (IS_ENABLED(CONFIG_X86)) if (!of_is_fwnode_add_links_supported())
return 0; return 0;
if (!con_np) if (!con_np)

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@@ -896,8 +896,6 @@ static void __init of_unittest_changeset(void)
unittest(!of_changeset_apply(&chgset), "apply failed\n"); unittest(!of_changeset_apply(&chgset), "apply failed\n");
of_node_put(nchangeset);
/* Make sure node names are constructed correctly */ /* Make sure node names are constructed correctly */
unittest((np = of_find_node_by_path("/testcase-data/changeset/n2/n21")), unittest((np = of_find_node_by_path("/testcase-data/changeset/n2/n21")),
"'%pOF' not added\n", n21); "'%pOF' not added\n", n21);
@@ -919,6 +917,7 @@ static void __init of_unittest_changeset(void)
if (!ret) if (!ret)
unittest(strcmp(propstr, "hello") == 0, "original value not in updated property after revert"); unittest(strcmp(propstr, "hello") == 0, "original value not in updated property after revert");
of_node_put(nchangeset);
of_changeset_destroy(&chgset); of_changeset_destroy(&chgset);
of_node_put(n1); of_node_put(n1);
@@ -4318,7 +4317,6 @@ static int testdrv_probe(struct pci_dev *pdev, const struct pci_device_id *id)
size = info->dtbo_end - info->dtbo_begin; size = info->dtbo_end - info->dtbo_begin;
ret = of_overlay_fdt_apply(info->dtbo_begin, size, &ovcs_id, dn); ret = of_overlay_fdt_apply(info->dtbo_begin, size, &ovcs_id, dn);
of_node_put(dn);
if (ret) if (ret)
return ret; return ret;

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@@ -640,7 +640,7 @@ static struct qcom_pdm_data *qcom_pdm_start(void)
struct qcom_pdm_data *data; struct qcom_pdm_data *data;
int ret, i; int ret, i;
match = of_match_node(qcom_pdm_domains, of_root); match = of_machine_get_match(qcom_pdm_domains);
if (!match) { if (!match) {
pr_notice("PDM: no support for the platform, userspace daemon might be required.\n"); pr_notice("PDM: no support for the platform, userspace daemon might be required.\n");
return ERR_PTR(-ENODEV); return ERR_PTR(-ENODEV);

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@@ -410,7 +410,7 @@ extern int of_alias_get_id(const struct device_node *np, const char *stem);
extern int of_alias_get_highest_id(const char *stem); extern int of_alias_get_highest_id(const char *stem);
bool of_machine_compatible_match(const char *const *compats); bool of_machine_compatible_match(const char *const *compats);
bool of_machine_device_match(const struct of_device_id *matches); const struct of_device_id *of_machine_get_match(const struct of_device_id *matches);
const void *of_machine_get_match_data(const struct of_device_id *matches); const void *of_machine_get_match_data(const struct of_device_id *matches);
/** /**
@@ -880,9 +880,9 @@ static inline bool of_machine_compatible_match(const char *const *compats)
return false; return false;
} }
static inline bool of_machine_device_match(const struct of_device_id *matches) static inline const struct of_device_id *of_machine_get_match(const struct of_device_id *matches)
{ {
return false; return NULL;
} }
static inline const void * static inline const void *
@@ -990,6 +990,11 @@ static inline int of_numa_init(void)
} }
#endif #endif
static inline bool of_machine_device_match(const struct of_device_id *matches)
{
return of_machine_get_match(matches) != NULL;
}
static inline struct device_node *of_find_matching_node( static inline struct device_node *of_find_matching_node(
struct device_node *from, struct device_node *from,
const struct of_device_id *matches) const struct of_device_id *matches)

View File

@@ -2929,7 +2929,7 @@ sub process {
} }
$checklicenseline = 1; $checklicenseline = 1;
if ($realfile !~ /^MAINTAINERS/) { if ($realfile !~ /^(MAINTAINERS|dev\/null)/) {
my $last_binding_patch = $is_binding_patch; my $last_binding_patch = $is_binding_patch;
$is_binding_patch = () = $realfile =~ m@^(?:Documentation/devicetree/|include/dt-bindings/)@; $is_binding_patch = () = $realfile =~ m@^(?:Documentation/devicetree/|include/dt-bindings/)@;

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@@ -324,7 +324,7 @@ ERROR(node_name_chars, check_node_name_chars, NODECHARS);
static void check_node_name_chars_strict(struct check *c, struct dt_info *dti, static void check_node_name_chars_strict(struct check *c, struct dt_info *dti,
struct node *node) struct node *node)
{ {
int n = strspn(node->name, c->data); size_t n = strspn(node->name, c->data);
if (n < node->basenamelen) if (n < node->basenamelen)
FAIL(c, dti, node, "Character '%c' not recommended in node name", FAIL(c, dti, node, "Character '%c' not recommended in node name",

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@@ -39,8 +39,6 @@ extern bool treesource_error;
#define DPRINT(fmt, ...) do { } while (0) #define DPRINT(fmt, ...) do { } while (0)
#endif #endif
static int dts_version = 1;
#define BEGIN_DEFAULT() DPRINT("<V1>\n"); \ #define BEGIN_DEFAULT() DPRINT("<V1>\n"); \
BEGIN(V1); \ BEGIN(V1); \
@@ -101,7 +99,6 @@ static void PRINTF(1, 2) lexical_error(const char *fmt, ...);
<*>"/dts-v1/" { <*>"/dts-v1/" {
DPRINT("Keyword: /dts-v1/\n"); DPRINT("Keyword: /dts-v1/\n");
dts_version = 1;
BEGIN_DEFAULT(); BEGIN_DEFAULT();
return DT_V1; return DT_V1;
} }

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@@ -227,7 +227,7 @@ struct node {
struct node *next_sibling; struct node *next_sibling;
char *fullpath; char *fullpath;
int basenamelen; size_t basenamelen;
cell_t phandle; cell_t phandle;
int addr_cells, size_cells; int addr_cells, size_cells;

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@@ -110,6 +110,14 @@ int fdt_check_header(const void *fdt)
|| (fdt_totalsize(fdt) > INT_MAX)) || (fdt_totalsize(fdt) > INT_MAX))
return -FDT_ERR_TRUNCATED; return -FDT_ERR_TRUNCATED;
/* memrsv block must be 8 byte aligned */
if (fdt_off_mem_rsvmap(fdt) % sizeof(uint64_t))
return -FDT_ERR_ALIGNMENT;
/* Structure block must be 4 byte aligned */
if (fdt_off_dt_struct(fdt) % FDT_TAGSIZE)
return -FDT_ERR_ALIGNMENT;
/* Bounds check memrsv block */ /* Bounds check memrsv block */
if (!check_off_(hdrsize, fdt_totalsize(fdt), if (!check_off_(hdrsize, fdt_totalsize(fdt),
fdt_off_mem_rsvmap(fdt))) fdt_off_mem_rsvmap(fdt)))

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@@ -22,6 +22,12 @@ static int fdt_blocks_misordered_(const void *fdt,
(fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt))); (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt)));
} }
static void fdt_downgrade_version(void *fdt)
{
if (!can_assume(LATEST) && fdt_version(fdt) > FDT_LAST_SUPPORTED_VERSION)
fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION);
}
static int fdt_rw_probe_(void *fdt) static int fdt_rw_probe_(void *fdt)
{ {
if (can_assume(VALID_DTB)) if (can_assume(VALID_DTB))
@@ -33,9 +39,8 @@ static int fdt_rw_probe_(void *fdt)
if (fdt_blocks_misordered_(fdt, sizeof(struct fdt_reserve_entry), if (fdt_blocks_misordered_(fdt, sizeof(struct fdt_reserve_entry),
fdt_size_dt_struct(fdt))) fdt_size_dt_struct(fdt)))
return -FDT_ERR_BADLAYOUT; return -FDT_ERR_BADLAYOUT;
if (!can_assume(LATEST) && fdt_version(fdt) > 17)
fdt_set_version(fdt, 17);
fdt_downgrade_version(fdt);
return 0; return 0;
} }

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@@ -1 +1 @@
#define DTC_VERSION "DTC 1.7.2-ga26ef640" #define DTC_VERSION "DTC 1.7.2-g53373d13"