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Merge tag 'mtd/changes-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull MTD updates from Miquel Raynal:
"There has been a lot of activity in the MTD subsystem recently, with a
number of SPI-NOR cleanups as well as the introduction of ECC engines
that can be used by SPI controllers (hence a few SPI patches in here).
Core MTD changes:
- Replace the expert mode symbols with a single helper
- Fix misuses of of_match_ptr()
- Remove partid and partname debugfs files
- tests: Fix eraseblock read speed miscalculation for lower partition
sizes
- TRX parser: Allow to use on MediaTek MIPS SoCs
MTD driver changes:
- spear_smi: use GFP_KERNEL
- mchp48l640: Add SPI ID table
- mchp23k256: Add SPI ID table
- blkdevs: Avoid soft lockups with some mtd/spi devices
- aspeed-smc: Improve probe resilience
Hyperbus changes:
- HBMC_AM654 should depend on ARCH_K3
NAND core changes:
- ECC:
- Add infrastructure to support hardware engines
- Add a new helper to retrieve the ECC context
- Provide a helper to retrieve a pilelined engine device
NAND-ECC changes:
- Macronix ECC engine:
- Add Macronix external ECC engine support
- Support SPI pipelined mode
- Make two read-only arrays static const
- Fix compile test issue
Raw NAND core changes:
- Fix misuses of of_match_node()
- Rework of_get_nand_bus_width()
- Remove of_get_nand_on_flash_bbt() wrapper
- Protect access to rawnand devices while in suspend
- bindings: Document the wp-gpios property
Rax NAND controller driver changes:
- atmel: Fix refcount issue in atmel_nand_controller_init
- nandsim:
- Add NS_PAGE_BYTE_SHIFT macro to replace the repeat pattern
- Merge repeat codes in ns_switch_state
- Replace overflow check with kzalloc to single kcalloc
- rockchip: Fix platform_get_irq.cocci warning
- stm32_fmc2: Add NAND Write Protect support
- pl353: Set the nand chip node as the flash node
- brcmnand: Fix sparse warnings in bcma_nand
- omap_elm: Remove redundant variable 'errors'
- gpmi:
- Support fast edo timings for mx28
- Validate controller clock rate
- Fix controller timings setting
- brcmnand:
- Add BCMA shim
- BCMA controller uses command shift of 0
- Allow platform data instantation
- Add platform data structure for BCMA
- Allow working without interrupts
- Move OF operations out of brcmnand_init_cs()
- Avoid pdev in brcmnand_init_cs()
- Allow SoC to provide I/O operations
- Assign soc as early as possible
Onenand changes:
- Check for error irq
SPI-NAND core changes:
- Delay a little bit the dirmap creation
- Create direct mapping descriptors for ECC operations
SPI-NAND driver changes:
- macronix: Use random program load
SPI NOR core changes:
- Move vendor specific code out of the core into vendor drivers.
- Unify all function and object names in the vendor modules.
- Make setup() callback optional to improve readability.
- Skip erase logic when the SPI_NOR_NO_ERASE flag is set at flash
declaration.
SPI changes:
- Macronix SPI controller:
- Fix the transmit path
- Create a helper to configure the controller before an operation
- Create a helper to ease the start of an operation
- Add support for direct mapping
- Add support for pipelined ECC operations
- spi-mem:
- Introduce a capability structure
- Check the controller extra capabilities
- cadence-quadspi/mxic: Provide capability structures
- Kill the spi_mem_dtr_supports_op() helper
- Add an ecc parameter to the spi_mem_op structure
Binding changes:
- Dropped mtd/cortina,gemini-flash.txt
- Convert BCM47xx partitions to json-schema
- Vendor prefixes: Clarify Macronix prefix
- SPI NAND: Convert spi-nand description file to yaml
- Raw NAND chip: Create a NAND chip description
- Raw NAND controller:
- Harmonize the property types
- Fix a comment in the examples
- Fix the reg property description
- Describe Macronix NAND ECC engine
- Macronix SPI controller:
- Document the nand-ecc-engine property
- Convert to yaml
- The interrupt property is not mandatory"
* tag 'mtd/changes-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (104 commits)
mtd: nand: ecc: mxic: Fix compile test issue
mtd: nand: mxic-ecc: make two read-only arrays static const
mtd: hyperbus: HBMC_AM654 should depend on ARCH_K3
mtd: core: Remove partid and partname debugfs files
dt-bindings: mtd: partitions: convert BCM47xx to the json-schema
mtd: tests: Fix eraseblock read speed miscalculation for lower partition sizes
mtd: rawnand: atmel: fix refcount issue in atmel_nand_controller_init
mtd: rawnand: rockchip: fix platform_get_irq.cocci warning
mtd: spi-nor: Skip erase logic when SPI_NOR_NO_ERASE is set
mtd: spi-nor: renumber flags
mtd: spi-nor: slightly change code style in spi_nor_sr_ready()
mtd: spi-nor: spansion: rename vendor specific functions and defines
mtd: spi-nor: spansion: convert USE_CLSR to a manufacturer flag
mtd: spi-nor: move all spansion specifics into spansion.c
mtd: spi-nor: spansion: slightly rework control flow in late_init()
mtd: spi-nor: micron-st: rename vendor specific functions and defines
mtd: spi-nor: micron-st: convert USE_FSR to a manufacturer flag
mtd: spi-nor: move all micron-st specifics into micron-st.c
mtd: spi-nor: xilinx: correct the debug message
mtd: spi-nor: xilinx: rename vendor specific functions and defines
...
This commit is contained in:
@@ -336,49 +336,31 @@ static const struct device_type mtd_devtype = {
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.release = mtd_release,
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};
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static int mtd_partid_debug_show(struct seq_file *s, void *p)
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static bool mtd_expert_analysis_mode;
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#ifdef CONFIG_DEBUG_FS
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bool mtd_check_expert_analysis_mode(void)
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{
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struct mtd_info *mtd = s->private;
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const char *mtd_expert_analysis_warning =
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"Bad block checks have been entirely disabled.\n"
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"This is only reserved for post-mortem forensics and debug purposes.\n"
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"Never enable this mode if you do not know what you are doing!\n";
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seq_printf(s, "%s\n", mtd->dbg.partid);
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return 0;
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return WARN_ONCE(mtd_expert_analysis_mode, mtd_expert_analysis_warning);
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}
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DEFINE_SHOW_ATTRIBUTE(mtd_partid_debug);
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static int mtd_partname_debug_show(struct seq_file *s, void *p)
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{
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struct mtd_info *mtd = s->private;
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seq_printf(s, "%s\n", mtd->dbg.partname);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(mtd_partname_debug);
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EXPORT_SYMBOL_GPL(mtd_check_expert_analysis_mode);
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#endif
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static struct dentry *dfs_dir_mtd;
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static void mtd_debugfs_populate(struct mtd_info *mtd)
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{
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struct mtd_info *master = mtd_get_master(mtd);
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struct device *dev = &mtd->dev;
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struct dentry *root;
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if (IS_ERR_OR_NULL(dfs_dir_mtd))
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return;
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root = debugfs_create_dir(dev_name(dev), dfs_dir_mtd);
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mtd->dbg.dfs_dir = root;
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if (master->dbg.partid)
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debugfs_create_file("partid", 0400, root, master,
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&mtd_partid_debug_fops);
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if (master->dbg.partname)
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debugfs_create_file("partname", 0400, root, master,
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&mtd_partname_debug_fops);
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mtd->dbg.dfs_dir = debugfs_create_dir(dev_name(dev), dfs_dir_mtd);
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}
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#ifndef CONFIG_MMU
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@@ -2372,14 +2354,6 @@ static struct backing_dev_info * __init mtd_bdi_init(const char *name)
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return ret ? ERR_PTR(ret) : bdi;
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}
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char *mtd_expert_analysis_warning =
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"Bad block checks have been entirely disabled.\n"
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"This is only reserved for post-mortem forensics and debug purposes.\n"
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"Never enable this mode if you do not know what you are doing!\n";
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EXPORT_SYMBOL_GPL(mtd_expert_analysis_warning);
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bool mtd_expert_analysis_mode;
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EXPORT_SYMBOL_GPL(mtd_expert_analysis_mode);
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static struct proc_dir_entry *proc_mtd;
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static int __init init_mtd(void)
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