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drm/amd/display: dce80, 100, 110 and 112 to dce ipp refactor
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher
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@@ -2,7 +2,7 @@
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# Makefile for the 'controller' sub-component of DAL.
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# It provides the control and status of HW CRTC block.
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DCE80 = dce80_ipp.o dce80_timing_generator.o \
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DCE80 = dce80_timing_generator.o \
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dce80_compressor.o dce80_mem_input.o dce80_hw_sequencer.o \
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dce80_resource.o
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