drm/amdgpu: Update invalid PTE flag setting

Update the invalid PTE flag setting with TF enabled.
This is to ensure, in addition to transitioning the
retry fault to a no-retry fault, it also causes the
wavefront to enter the trap handler. With the current
setting, the fault only transitions to a no-retry fault.
Additionally, have 2 sets of invalid PTE settings, one for
TF enabled, the other for TF disabled. The setting with
TF disabled, doesn't work with TF enabled.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mukul Joshi
2023-06-09 11:11:53 -04:00
committed by Alex Deucher
parent bc8ba5f2da
commit e77673d14f
9 changed files with 45 additions and 1 deletions

View File

@@ -778,6 +778,27 @@ int amdgpu_vm_pde_update(struct amdgpu_vm_update_params *params,
1, 0, flags);
}
/**
* amdgpu_vm_pte_update_noretry_flags - Update PTE no-retry flags
*
* @adev - amdgpu_device pointer
* @flags: pointer to PTE flags
*
* Update PTE no-retry flags when TF is enabled.
*/
static void amdgpu_vm_pte_update_noretry_flags(struct amdgpu_device *adev,
uint64_t *flags)
{
/*
* Update no-retry flags with the corresponding TF
* no-retry combination.
*/
if ((*flags & AMDGPU_VM_NORETRY_FLAGS) == AMDGPU_VM_NORETRY_FLAGS) {
*flags &= ~AMDGPU_VM_NORETRY_FLAGS;
*flags |= adev->gmc.noretry_flags;
}
}
/*
* amdgpu_vm_pte_update_flags - figure out flags for PTE updates
*
@@ -804,6 +825,16 @@ static void amdgpu_vm_pte_update_flags(struct amdgpu_vm_update_params *params,
flags |= AMDGPU_PTE_EXECUTABLE;
}
/*
* Update no-retry flags to use the no-retry flag combination
* with TF enabled. The AMDGPU_VM_NORETRY_FLAGS flag combination
* does not work when TF is enabled. So, replace them with
* AMDGPU_VM_NORETRY_FLAGS_TF flag combination which works for
* all cases.
*/
if (level == AMDGPU_VM_PTB)
amdgpu_vm_pte_update_noretry_flags(adev, &flags);
/* APUs mapping system memory may need different MTYPEs on different
* NUMA nodes. Only do this for contiguous ranges that can be assumed
* to be on the same NUMA node.