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BackMerge v5.1-rc5 into drm-next

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Need rc5 for udl fix to add udl cleanups on top.

Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie
2019-04-15 15:51:49 +10:00
parent ecc4946f11 dc4060a5dc
commit f06ddb5309
1017 changed files with 11270 additions and 10110 deletions
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5
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
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@@ -4829,6 +4829,7 @@ static void handle_cursor_update(struct drm_plane *plane,
amdgpu_crtc->cursor_width = plane->state->crtc_w;
amdgpu_crtc->cursor_height = plane->state->crtc_h;
memset(&attributes, 0, sizeof(attributes));
attributes.address.high_part = upper_32_bits(address);
attributes.address.low_part = lower_32_bits(address);
attributes.width = plane->state->crtc_w;
@@ -5757,9 +5758,11 @@ static void get_freesync_config_for_crtc(
struct amdgpu_dm_connector *aconnector =
to_amdgpu_dm_connector(new_con_state->base.connector);
struct drm_display_mode *mode = &new_crtc_state->base.mode;
int vrefresh = drm_mode_vrefresh(mode);
new_crtc_state->vrr_supported = new_con_state->freesync_capable &&
aconnector->min_vfreq <= drm_mode_vrefresh(mode);
vrefresh >= aconnector->min_vfreq &&
vrefresh <= aconnector->max_vfreq;
if (new_crtc_state->vrr_supported) {
new_crtc_state->stream->ignore_msa_timing_param = true;