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drm/amdgpu: Add XCC inst to PASID TLB flushing
Add XCC instance to select the correct KIQ ring when flushing TLBs on a multi-XCC setup. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Tested-by: Amber Lin <Amber.Lin@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
e2069a7b08
commit
f87f686482
@@ -119,7 +119,8 @@ struct amdgpu_gmc_funcs {
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uint32_t vmhub, uint32_t flush_type);
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/* flush the vm tlb via pasid */
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int (*flush_gpu_tlb_pasid)(struct amdgpu_device *adev, uint16_t pasid,
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uint32_t flush_type, bool all_hub);
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uint32_t flush_type, bool all_hub,
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uint32_t inst);
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/* flush the vm tlb via ring */
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uint64_t (*emit_flush_gpu_tlb)(struct amdgpu_ring *ring, unsigned vmid,
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uint64_t pd_addr);
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@@ -296,9 +297,9 @@ struct amdgpu_gmc {
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};
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#define amdgpu_gmc_flush_gpu_tlb(adev, vmid, vmhub, type) ((adev)->gmc.gmc_funcs->flush_gpu_tlb((adev), (vmid), (vmhub), (type)))
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#define amdgpu_gmc_flush_gpu_tlb_pasid(adev, pasid, type, allhub) \
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#define amdgpu_gmc_flush_gpu_tlb_pasid(adev, pasid, type, allhub, inst) \
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((adev)->gmc.gmc_funcs->flush_gpu_tlb_pasid \
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((adev), (pasid), (type), (allhub)))
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((adev), (pasid), (type), (allhub), (inst)))
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#define amdgpu_gmc_emit_flush_gpu_tlb(r, vmid, addr) (r)->adev->gmc.gmc_funcs->emit_flush_gpu_tlb((r), (vmid), (addr))
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#define amdgpu_gmc_emit_pasid_mapping(r, vmid, pasid) (r)->adev->gmc.gmc_funcs->emit_pasid_mapping((r), (vmid), (pasid))
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#define amdgpu_gmc_map_mtype(adev, flags) (adev)->gmc.gmc_funcs->map_mtype((adev),(flags))
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