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drm/amd/display: expose additional modifier for DCN32/321
[Why&How] Some userspace expect a backwards compatible modifier on DCN32/321. For hardware with num_pipes more than 16, we expose the most efficient modifier first. As a fall back method, we need to expose slightly inefficient modifier AMD_FMT_MOD_TILE_GFX9_64K_R_X after the best option. Also set the number of packers to fixed value as required per hardware documentation. This value is cached during hardware initialization and can be read through the base driver. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
7268f0a9e8
commit
ff15cea338
@@ -744,8 +744,7 @@ static int convert_tiling_flags_to_modifier(struct amdgpu_framebuffer *afb)
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switch (version) {
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case AMD_FMT_MOD_TILE_VER_GFX11:
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pipe_xor_bits = min(block_size_bits - 8, pipes);
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packers = min(block_size_bits - 8 - pipe_xor_bits,
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ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs));
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packers = ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs);
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break;
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case AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS:
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pipe_xor_bits = min(block_size_bits - 8, pipes);
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