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rtlwifi: rtl8192{c,u}: Remove CamelCase variables

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This patch affects modules rtl8192ce, rtl8192cu, and rtl8192com.

The following checkpatch exceptions are also fixed:

CHECK: No space is necessary after a cast
#237: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.c:90:
+                                                     (u8 *) (&rfstate));

CHECK: No space is necessary after a cast
#744: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.c:329:
+                       pwr_val[i] = (u8) ((writeval & (0x7f <<

CHECK: No space is necessary after a cast
#784: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.c:365:
+                                              (u8) writeval);

CHECK: spaces preferred around that '/' (ctx:VxV)
#963: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c:513:
+               txqpageunit = txqpagenum/outepnum;
                                        ^

CHECK: Unnecessary parentheses around 'outepnum > 1'
#975: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c:521:
+               if ((outepnum > 1) && (txqremaininpage))

CHECK: Alignment should match open parenthesis
#1059: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c:617:
+static void _rtl92cu_init_chipn_two_out_ep_priority(struct ieee80211_hw *hw,
                                                                bool wmm_enable,

ERROR: "foo * bar" should be "foo *bar"
#1940: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.c:591:
+void rtl92cu_fill_fake_txdesc(struct ieee80211_hw *hw, u8 *pdesc,

Note that not all checkpatch exceptions are addressed. Those will be
handled in later patches.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Larry Finger
2019-02-14 16:36:40 -06:00
committed by Kalle Valo
parent d420110635
commit ff9704538e
19 changed files with 390 additions and 391 deletions
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4
drivers/net/wireless/realtek/rtlwifi/rtl8192c/dm_common.h
View File

@@ -27,7 +27,7 @@
#define DM_DIG_FA_TH1 0x100
#define DM_DIG_FA_TH2 0x200
#define RXPATHSELECTION_SS_TH_lOW 30
#define RXPATHSELECTION_SS_TH_LOW 30
#define RXPATHSELECTION_DIFF_TH 18
#define DM_RATR_STA_INIT 0
@@ -38,7 +38,7 @@
#define CTS2SELF_THVAL 30
#define REGC38_TH 20
#define WAIOTTHVal 25
#define WAIOTTHVAL 25
#define TXHIGHPWRLEVEL_NORMAL 0
#define TXHIGHPWRLEVEL_LEVEL1 1