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drm/amdgpu: Add documentation associated with CSB
Add a description for the get_csb_buffer callback, update the glossary, and add some extra information about RB, which is associated with CSB configuration. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher
parent
e7164c7ade
commit
ffc7e11c10
@@ -170,10 +170,46 @@ struct amdgpu_kiq {
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#define AMDGPU_GFX_MAX_SE 4
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#define AMDGPU_GFX_MAX_SH_PER_SE 2
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/**
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* amdgpu_rb_config - Configure a single Render Backend (RB)
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*
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* Bad RBs are fused off and there is a harvest register the driver reads to
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* determine which RB(s) are fused off so that the driver can configure the
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* hardware state so that nothing gets sent to them. There are also user
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* harvest registers that the driver can program to disable additional RBs,
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* etc., for testing purposes.
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*/
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struct amdgpu_rb_config {
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/**
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* @rb_backend_disable:
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*
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* The value captured from register RB_BACKEND_DISABLE indicates if the
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* RB backend is disabled or not.
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*/
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uint32_t rb_backend_disable;
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/**
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* @user_rb_backend_disable:
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*
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* The value captured from register USER_RB_BACKEND_DISABLE indicates
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* if the User RB backend is disabled or not.
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*/
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uint32_t user_rb_backend_disable;
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/**
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* @raster_config:
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*
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* To set up all of the states, it is necessary to have two registers
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* to keep all of the states. This field holds the first register.
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*/
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uint32_t raster_config;
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/**
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* @raster_config_1:
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*
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* To set up all of the states, it is necessary to have two registers
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* to keep all of the states. This field holds the second register.
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*/
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uint32_t raster_config_1;
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};
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@@ -221,6 +257,13 @@ struct amdgpu_gfx_config {
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uint32_t macrotile_mode_array[16];
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struct gb_addr_config gb_addr_config_fields;
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/**
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* @rb_config:
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*
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* Matrix that keeps all the Render Backend (color and depth buffer
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* handling) configuration on the 3D engine.
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*/
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struct amdgpu_rb_config rb_config[AMDGPU_GFX_MAX_SE][AMDGPU_GFX_MAX_SH_PER_SE];
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/* gfx configure feature */
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