2 Commits

Author	SHA1	Message	Date
Jisheng Zhang	b71e8ecd57	clk: berlin: bg2q: remove non-exist "smemc" gate clock ... The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable register is for nfc. Current code use bit19 for non-exist "smemc" incorrectly, this prevents eMMC from working due to the sdhci's "core" clk is still gated. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Cc: stable@vger.kernel.org # 3.16+ Signed-off-by: Michael Turquette <mturquette@linaro.org>	2015-01-13 10:58:43 -08:00
Alexandre Belloni	18882ac5f3	clk: berlin: add core clock driver for BG2Q ... This driver deals with the core clocks found on Marvell Berlin BG2Q. For the shared register dividers, make use of the corresponding driver and add some single clock muxes and gates for the rest. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>	2014-05-29 09:30:19 -07:00