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51 Commits

Author SHA1 Message Date
Wolfram Sang
cdbfaf640a ARM: dts: convert to SPDX identifier for Renesas boards 
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2018-07-23 13:33:03 +02:00
Geert Uytterhoeven
9562a6b1d0 ARM: dts: r8a7745: Add PMU device node 
Enable support for the ARM Performance Monitor Units in the Cortex-A7
CPU cores on RZ/G1E by adding a device node for the PMU.

New Linux output:

    hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2018-05-14 16:40:45 +02:00
Fabrizio Castro
5f39290ff3 ARM: dts: r8a7745: Add watchdog support to SoC dtsi 
This patch adds watchdog support to the r8a7745 SoC dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2018-04-25 08:51:09 +02:00
Fabrizio Castro
7270dedc84 ARM: dts: r8a7745: Adjust SMP routine size 
This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2018-04-25 08:51:04 +02:00
Biju Das
76a2577d97 ARM: dts: r8a7745: Add VSP support 
Add VSP support to SoC DT.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2018-02-12 13:50:58 +01:00
Biju Das
0dcba3de58 ARM: dts: r8a7745: Add IPMMU DT nodes 
Add the six IPMMU instances found in the r8a7745 to DT with a disabled
status.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2018-02-12 13:50:58 +01:00
Simon Horman
28c07001db ARM: dts: r8a7745: sort subnodes of soc node 
Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together and sorted alphabetically.

Minor whitespace and line-wrapping changes are also made
to match the formatting of R-Car Gen2 SoCs.

This patch should not introduce any functional change.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2018-02-12 13:50:58 +01:00
Biju Das
5b06201067 ARM: dts: r8a7745: Add missing clock for secondary CA7 CPU core 
Add the missing clock to CA7 CPU1 node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-12-22 09:24:00 +01:00
Biju Das
17d2e479d0 ARM: dts: r8a7745: Add sound support 
Define the generic r8a7745(RZ/G1E) part of the sound device node.

This patch is based on the r8a7794 sound work by Sergei Shtylyov.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-12-21 12:21:40 +01:00
Biju Das
a14a05c2f3 ARM: dts: r8a7745: Add audio DMAC support 
Instantiate the audio DMA controller on the r8a7745 device tree.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-12-21 12:21:17 +01:00
Biju Das
44da63157d ARM: dts: r8a7745: Add audio clocks 
Describe the external audio clocks required by the sound driver.
Boards that provide audio clocks need to override the clock frequencies.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-12-21 12:20:49 +01:00
Simon Horman
7bee3795c8 ARM: dts: r8a7745: move timer node out of bus 
The timer node does not have any register properties and thus shouldn't be
placed on the bus.

This problem is flagged by the compiler as follows:
$ make dtbs W=1
...
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property
  DTC     arch/arm/boot/dts/r8a7745-sk-rzg1e.dtb
arch/arm/boot/dts/r8a7745-sk-rzg1e.dtb: Warning (simple_bus_reg): Node /soc/timer missing or empty reg/ranges property

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2017-12-20 10:30:56 +01:00
Simon Horman
d913ef1fae ARM: dts: r8a7745: sort root sub-nodes alphabetically 
Sort root sub-nodes alphabetically to allow for easier maintenance
of this file.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2017-12-20 10:27:49 +01:00
Fabrizio Castro
9680c97b51 ARM: dts: r8a7745: Add CMT SoC specific support 
Add CMT[01] support to SoC DT.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-12-20 10:14:59 +01:00
Fabrizio Castro
b9db514555 ARM: dts: r8a7745: Add TPU support 
Add TPU support to SoC DT.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-12-20 10:12:00 +01:00
Fabrizio Castro
3711d0ede2 ARM: dts: r8a7745: Add PWM SoC support 
Add the definitions for pwm[0123456] to the SoC .dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-12-20 10:11:32 +01:00
Fabrizio Castro
aaca1ff0db ARM: dts: r8a7745: Add APMU node and second CPU core 
Add DT node for the Advanced Power Management Unit (APMU), add the
second CPU core, and use "renesas,apmu" as "enable-method".

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-12-07 09:48:13 +01:00
Fabrizio Castro
1a20f21899 ARM: dts: r8a7745: add VIN dt support 
Add VIN[01] support to SoC dt. Also, add aliases.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-11-27 11:40:26 +01:00
Fabrizio Castro
85d3122659 ARM: dts: r8a7745: Add CAN[01] SoC support 
Add the definitions for can0 and can1 to the SoC .dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-11-27 11:40:14 +01:00
Fabrizio Castro
5841b8b32b ARM: dts: r8a7745: Add DU support 
Add du node to r8a7745 SoC DT. Boards that want to enable the DU
need to specify the output topology.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-11-27 11:40:11 +01:00
Simon Horman
35098dd2e3 ARM: dts: r8a7745: Use R-Car SDHI Gen2 fallback compat string 
Use newly added R-Car SDHI Gen2 fallback compat string
in the DT of the r8a7745 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-11-27 11:39:59 +01:00
Fabrizio Castro
0ee0aff583 ARM: dts: r8a7745: Add IIC cores to dtsi 
Add iic0 and iic1 nodes to SoC dtsi. Also, define aliases i2c6
and i2c7. Board specific DT files will enable the interfaces
if needed.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-11-27 11:39:57 +01:00
Biju Das
d4595f0408 ARM: dts: r8a7745: Enable DMA for HSUSB 
From: Biju Das <biju.das@bp.renesas.com>

This patch adds DMA properties to the HSUSB node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-11-27 11:39:54 +01:00
Biju Das
fbdf17b307 ARM: dts: r8a7745: Add USB-DMAC device nodes 
From: Biju Das <biju.das@bp.renesas.com>

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-11-27 11:39:53 +01:00
Biju Das
c5a541b81b ARM: dts: r8a7745: Add HS-USB device node 
From: Biju Das <biju.das@bp.renesas.com>

Define the R8A7745 generic part of the HS-USB device node. It is up to the
board file to enable the device.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-11-27 11:39:52 +01:00
Simon Horman
d596026911 ARM: dts: r8a7745: Use R-Car Gen2 Ether fallback compat string 
Use newly added R-Car Gen2 Ether fallback compat string
in the DT of the r8a7745 SoC.

This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2017-11-27 11:39:37 +01:00
Biju Das
c3e35873e3 ARM: dts: r8a7745: Link PCI USB devices to USB PHY 
Describe the PCI USB devices that are behind the PCI bridges, adding
necessary links to the USB PHY device.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-10-12 12:14:38 +02:00
Biju Das
237173a4bb ARM: dts: r8a7745: Add USB PHY DT support 
Define the r8a7745 generic part of the USB PHY device node.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-10-12 12:14:24 +02:00
Biju Das
ab290a3292 ARM: dts: r8a7745: Add internal PCI bridge nodes 
Add device nodes for the r8a7745 internal PCI bridge devices.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-10-12 12:13:56 +02:00
Fabrizio Castro
e527649c32 ARM: dts: r8a7745: Add MSIOF[012] support 
Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
Also, define aliases for spi[123].

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-09-28 07:59:30 +02:00
Fabrizio Castro
2391d0269a ARM: dts: r8a7745: Add QSPI support 
Add the DT node for the QSPI interface to the SoC dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-09-21 10:44:40 +02:00
Fabrizio Castro
7079131ef9 ARM: dts: r8a7745: Add SDHI controllers 
Add the SDHI controllers to the r8a7745 device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-09-19 11:20:19 +02:00
Biju Das
372b01369f ARM: dts: r8a7745: Add Ethernet AVB support 
Add Ethernet AVB support for r8a7745 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-09-19 11:19:51 +02:00
Fabrizio Castro
933b16efb7 ARM: dts: r8a7745: Add MMC interface support 
Add MMC interface support for r8a7745 SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-09-19 11:19:29 +02:00
Fabrizio Castro
282fbf4066 ARM: dts: r8a7745: Add I2C DT support 
Add I2C[0-5] devices to the r8a7745 device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-09-19 11:19:27 +02:00
Biju Das
3163c03ec3 ARM: dts: r8a7745: Add GPIO support 
Describe GPIO blocks in the R8A7745 device tree.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-09-19 11:19:22 +02:00
Sergei Shtylyov
95b94ed9ab ARM: dts: r8a7745: add PFC support 
Define the generic R8A7745 part of the PFC device node.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-08-15 17:59:41 +02:00
Geert Uytterhoeven
d2791b1c8f ARM: dts: r8a7745: Reserve SRAM for the SMP jump stub 
Reserve SRAM for the jump stub for CPU core bringup.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-07-27 16:28:37 +02:00
Geert Uytterhoeven
825216b816 ARM: dts: r8a7745: Add Inter Connect RAM 
RZ/G1E has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-07-27 16:28:34 +02:00
Geert Uytterhoeven
1efab6e91e ARM: dts: r8a7745: Add reset control properties 
Add properties to describe the reset topology for on-SoC devices:
  - Add the "#reset-cells" property to the CPG/MSSR device node,
  - Add resets and reset-names properties to the various device nodes.

This allows to reset SoC devices using the Reset Controller API.

Note that all resets added match the corresponding module clocks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-03-21 09:18:56 +01:00
Geert Uytterhoeven
51c00a9f73 ARM: dts: r8a7745: Remove unit-address and reg from integrated cache 
The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.

Fixes: c95360247b ("ARM: dts: r8a7745: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-03-07 07:44:26 +01:00
Geert Uytterhoeven
ad20bb6868 ARM: dts: r8a7745: Fix SCIFB0 dmas indentation 
Fixes: e0d2da54c4 ("ARM: dts: r8a7745: add [H]SCIF{|A|B} support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-03-06 10:06:49 +01:00
Marc Zyngier
387720c938 ARM: DTS: Fix register map for virt-capable GIC 
Since everybody copied my own mistake from the DT binding example,
let's address all the offenders in one swift go.

Most of them got the CPU interface size wrong (4kB, while it should
be 8kB), except for both keystone platforms which got the control
interface wrong (4kB instead of 8kB).

In a few cases where I knew for sure what implementation was used,
I've added the "arm,gic-400" compatible string. I'm 99% sure that
this is what everyone is using, but short of having the TRM for
all the other SoCs, I've left them alone.

Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2017-02-07 15:06:46 +01:00
Geert Uytterhoeven
db017f3996 ARM: dts: r8a7745: Link ARM GIC to clock and clock domain 
Link the ARM GIC to the INTC-SYS module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-01-23 10:41:40 +01:00
Geert Uytterhoeven
8916c7b583 ARM: dts: r8a7745: Add device node for PRR 
Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-01-03 10:46:11 +01:00
Geert Uytterhoeven
13ae6ac495 ARM: dts: r8a7745: Move RST node before SYSC node 
To preserve both alphabetical (label) and numerical ordering (unit
address).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-01-03 10:46:06 +01:00
Sergei Shtylyov
28c43fbb3c ARM: dts: r8a7745: add IRQC support 
Describe the IRQC interrupt controller in the R8A7745 device tree.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-11-23 20:52:31 +01:00
Sergei Shtylyov
bed98a59b6 ARM: dts: r8a7745: add Ether support 
Define the generic R8A7745 part of the Ether device node.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-11-23 20:52:30 +01:00
Sergei Shtylyov
e0d2da54c4 ARM: dts: r8a7745: add [H]SCIF{|A|B} support 
Describe [H]SCIF{|A|B} ports in the R8A7745 device tree.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-11-23 20:52:30 +01:00
Sergei Shtylyov
06a80bad04 ARM: dts: r8a7745: add SYS-DMAC support 
Describe SYS-DMAC0/1 in the R8A7745 device tree.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-11-23 20:52:29 +01:00